summaryrefslogtreecommitdiffstats
path: root/drivers/irqchip
AgeCommit message (Expand)AuthorFilesLines
2015-04-02Merge branch 'irqchip/renesas' into irqchip/coreJason Cooper1-6/+48
2015-04-02Merge branch 'irqchip/mvebu' into irqchip/coreJason Cooper1-0/+1
2015-04-02irqchip: renesas-irqc: Add wake-up supportGeert Uytterhoeven1-1/+25
2015-04-02irqchip: armada-370-xp: Allow using wakeup sourceGregory CLEMENT1-0/+1
2015-04-01IRQCHIP: Add new driver for BCM7038-style level 1 interrupt controllersKevin Cernekee3-0/+341
2015-04-01IRQCHIP: bcm7120-l2: Add support for BCM3380-style controllersKevin Cernekee1-4/+51
2015-04-01IRQCHIP: bcm7120-l2: Split STB-specific logic into its own functionKevin Cernekee1-55/+68
2015-04-01IRQCHIP: bcm7120-l2: Refactor driver for arbitrary IRQEN/IRQSTAT offsetsKevin Cernekee1-13/+28
2015-04-01IRQCHIP: brcmstb-l2: don't clear wakeable interrupts at init timeBrian Norris1-3/+6
2015-03-31IRQCHIP: irq-mips-gic: Add new functions to start/stop the GIC counterMarkos Chandras1-0/+21
2015-03-31IRQCHIP: mips-gic: Add function for retrieving FDC IRQJames Hogan1-0/+23
2015-03-31irqchip: mips-gic: Don't treat FDC IRQ as percpu devidJames Hogan1-5/+10
2015-03-31IRQCHIP: mips-gic: Fix typo in commentJames Hogan1-1/+1
2015-03-29irqchip: mips-gic: Add new functions to start/stop the GIC counterMarkos Chandras1-0/+21
2015-03-29irqchip: tegra: Add Tegra210 supportThierry Reding1-1/+7
2015-03-29Merge branch 'irqchip/urgent-gic' into irqchip/urgentJason Cooper1-9/+48
2015-03-29irqchip: gicv3-its: Use non-cacheable accesses when no shareabilityMarc Zyngier1-4/+43
2015-03-29irqchip: gicv3-its: Fix PROP/PEND and BASE/CBASE confusionMarc Zyngier1-3/+3
2015-03-29irqchip: gicv3-its: Fix device ID encodingAndre Przywara1-1/+1
2015-03-29irqchip: gicv3-its: Fix encoding of collection's target redistributorMarc Zyngier1-1/+1
2015-03-26ACPI: move arm64 GSI IRQ model to generic GSI IRQ layerLorenzo Pieralisi1-0/+2
2015-03-26irqchip: Add GICv2 specific ACPI boot supportTomasz Nowicki2-0/+105
2015-03-23irqchip: digicolor: Move digicolor_set_gc to init sectionBaruch Siach1-2/+2
2015-03-23irqchip: renesas-irqc: Add minimal runtime PM supportGeert Uytterhoeven1-0/+8
2015-03-23irqchip: renesas-irqc: Add more register documentationGeert Uytterhoeven1-5/+15
2015-03-15Merge branch 'irqchip/vybrid' into irqchip/coreJason Cooper2-0/+213
2015-03-15Merge branch 'irqchip/mvebu' into irqchip/coreJason Cooper1-30/+75
2015-03-15Merge branch 'irqchip/urgent-gic' into irqchip/urgentJason Cooper3-38/+141
2015-03-15irqchip: gic: Don't complain in gic_get_cpumask() if UP systemStephen Boyd1-1/+1
2015-03-15irqchip: gic: Add an entry point to set up irqchip flagsMarc Zyngier1-0/+5
2015-03-15irqchip: gic: Get rid of routable domainMarc Zyngier1-54/+5
2015-03-15irqchip: crossbar: Convert dra7 crossbar to stacked domainsMarc Zyngier1-87/+123
2015-03-15irqchip: tegra: Add DT-based support for legacy interrupt controllerMarc Zyngier2-0/+372
2015-03-08irqchip: gicv3-its: Support safe initializationYun Wu1-0/+35
2015-03-08irqchip: gicv3-its: Define macros for GITS_CTLR fieldsYun Wu1-1/+1
2015-03-08irqchip: gicv3-its: Add limitation to page orderYun Wu1-0/+5
2015-03-08irqchip: gicv3-its: Use 64KB page as default granuleYun Wu1-2/+2
2015-03-08irqchip: gicv3-its: Zero itt before handling to hardwareYun Wu1-1/+1
2015-03-08irqchip: gic-v3: Fix out of bounds access to cpu_logical_mapVladimir Murzin1-1/+1
2015-03-08irqchip: gic: Fix unsafe locking reported by lockdepMarc Zyngier1-8/+12
2015-03-08irqchip: gicv3-its: Fix unsafe locking reported by lockdepMarc Zyngier1-9/+14
2015-03-08irqchip: gicv3-its: Iterate over PCI aliases to generate ITS configurationMarc Zyngier1-8/+46
2015-03-08irqchip: gicv3-its: Allocate enough memory for the full range of DeviceIDMarc Zyngier1-4/+21
2015-03-08irqchip: gicv3-its: Fix ITS CPU initVladimir Murzin1-5/+4
2015-03-08irqchip: armada-370-xp: Enable the PMU interruptsMaxime Ripard1-3/+20
2015-03-08irqchip: armada-370-xp: Introduce a is_percpu_irq() helper for readabilityEzequiel Garcia1-4/+14
2015-03-08irqchip: armada-370-xp: Initialize per cpu registers when CONFIG_SMP=NEzequiel Garcia1-24/+23
2015-03-08irqchip: vf610-mscm-ir: Add support for Vybrid MSCM interrupt routerStefan Agner2-0/+213
2015-03-08irqchip: armada-370-xp: Fix chained per-cpu interruptsMaxime Ripard1-1/+20
2015-03-07Merge branch 'irqchip/st' into irqchip/coreJason Cooper3-0/+214
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-20 15:16:22 +0000