summaryrefslogtreecommitdiffstats
path: root/drivers/iio/adc/meson_saradc.c
AgeCommit message (Collapse)AuthorFilesLines
2020-09-22Merge tag 'iio-for-5.10b-take2' of ↵Greg Kroah-Hartman1-7/+4
https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next Jonathan writes: Second set of features and cleanups for IIO in 5.10 We have a couple of changes that apply to large sets of drivers, so I have grouped those to keep this short. There are a few late breaking fixes in here that can wait for the merge window. dt yaml conversions ------------------- * adi,ad7768-1 * adi,ad7949 * aspeed,ast2400 * cosmic,10001-adc * dlg,da9150-gpadc * fsl,imx25-gcq * fsl,imx7d-adc * fsl,vf610 * holt,hi8435 * marvell,berlin2-adc * motorola,cpcap-adc * nuvoton,nau7802 * nuvoton,npcm750-adc * nxp,lpc1850-adc * nxp,lpc3220 * sprd,sc2720-adc * st,stmpe-adc * ti,adc12138 * ti,ads1015 * ti,ads7950 * ti,twl4030-madc Features -------- * adxrs290 - Add triggered buffer support and expose data ready signal as a possible trigger. Includes updating bindings. - Add debugfs hooks for register access. * mlx90632 - Add a clear user interface to override the measured ambient temperature. * vl53l0x - Add IRQ support including dt bindings. Cleanups and minor fixes ------------------------ (groups) Replace mlock with local lock: * adf4350 * exynos-adc * fls-imx25-gcq * stm32-dac devm use to simplify probe error handling and remove functions. * adis16201 * adis16203 * adis16209 * adis16240 * adis16136 * adis16260 * adis16400 * adis16460 * adis16480 * adis library - drop unused adis_setup_buffer_and_trigger() of_match_ptr removal and incorrect ACPI binding removal of_match_ptr() rarely makes sense in an IIO driver as space saving is trivial and it breaks ACPI PRP0001 based instantiation. Mostly this series is about removing examples that get copied into new drivers. * ad2s1200 * ad5272 * ad5446 * ad5592r * ad5593r * ad5703 * ak8974 * ak8975 * ams-iaq-core * as3935 * atlas-sensor * ds1803 * hdc100x * htu21 * icp10100 * lmp91000 * pulsedlight * max30102 * max5432 * max5481 * mcp4018 * mcp4131 * mcp4531 * mcp4725 * ms5611 * ms5637 * si7020 * sgp30 * ti-dac082s085 * ti-dac5571 * tmp007 * tsys01 * vz89x * zpa2326 kernel-doc fixes * iio-core * ad7303 * ad7947 * adis16080 * adis16400 * iio_dummy_evgen * sgp30 Fixes for buffer alignment when passed to iio_push_to_buffers_with_timestamp() This is a long running effort. There are a few more drivers to come. * inv_mpu6050 * itg3200 * si1145 * st_lsm6dsx * ti-adc0832 * ti-adc12138 (not driver focused) * MAINTAINERS - Consolidate Analog Device IIO entries whilst removing Beniamin Bia. - Remove Hartmut Knaack as a listed IIO maintainer as he hasn't been active for a long time and people are getting intermitted bounces. * Add __printf() markings to a few functions that were missing them. * drop some rotted documentation from staging. * rework buffer sysfs file creation (precursor to multiple buffer support) (individual drivers) * ad5592r - Fix use of true for IIO_SHARED_BY_TYPE - Tidy up locking and indentation. * ad9467 - Improve error message on chip-id missmatch. - Use more appropriate error value if chip-id not recognised. * adis-library - Simplify burst mode handling. * adxrs290 - Make sure to switch device to standby mode during remove. * as73211 - Increase measurement timeout as seems some devices are slower. * bma180 - Fix use of true fo IIO_SHARED_BY_TYPE * exynos_adc - Update binding to require second interrut with touch screen. - Update binding to not require syscon on S5Pv210 * hmc5843 - Fix use of true for IIO_SHARED_BY_TYPE * inv_mpu6050 - Use regmap_noinc_read() for fifo reading. * palmas_gpadc - Use module_platform_driver() to remove boilerplate. * meson-saradc - style consistency fixes * rockchip_saradc - Allow compile testing with !ARM. * st_lsm6dsx - Changing scaling factor to use IIO_VAL_INT_PLUS_NANO to improve precision. - Fix an issue with unchecked return value. * stm32-adc - Fix a missing return introduced in dev_err_probe() patch earlier in cycle. * sx9310 - Prefer async mode for probe as paticularly slow startup. * vcnl4000 - Add missing interrupt property to dt binding. * tag 'iio-for-5.10b-take2' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (126 commits) dt-bindings: iio: vishay,vcnl4000: add interrupts property iio:imu:inv_mpu6050: Use regmap_noinc_read for fifo reads. iio:imu:inv_mpu6050 Fix dma and ts alignment and data leak issues. iio:adc:ti-adc12138 Fix alignment issue with timestamp iio:adc:ti-adc0832 Fix alignment issue with timestamp iio:imu:st_lsm6dsx Fix alignment and data leak issues iio:light:si1145: Fix timestamp alignment and prevent data leak. iio:gyro:itg3200: Fix timestamp alignment and prevent data leak. iio:imu:st_lsm6dsx: check st_lsm6dsx_shub_read_output return iio: adc: exynos_adc: Replace indio_dev->mlock with own device lock dt-bindings:iio:adc:holt,hi8435 yaml conversion dt-bindings:iio:adc:adi,ad7768-1 yaml conversion dt-bindings:iio:adc:adi,ad7949 yaml conversion dt-bindings:iio:adc:dlg,da9150-gpadc yaml conversion dt-bindings:iio:adc:motorola,cpcap-adc yaml conversion dt-bindings:iio:adc:nxp,lpc3220-adc yaml conversion dt-bindings:iio:adc:nxp,lpc1850-adc yaml conversion dt-bindings:iio:adc:fsl,imx25-gcq yaml conversion dt-bindings:iio:adc:fsl,imx7d-adc yaml conversion dt-bindings:iio:adc:ti,ads1015 yaml conversion ...
2020-09-16iio: adc: meson-saradc: Make the of_device_id array style consistentMartin Blumenstingl1-7/+4
Use only one line for the closing bracket of the last entry and the opening bracket for the next one to keep the style across the whole array consistent. Also add a "sentinel" comment to the last entry and remove the comma to ensure that there won't be any entry after it. No functional changes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20200915192621.13202-1-martin.blumenstingl@googlemail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2020-09-14Merge 5.9-rc5 into staging-nextGreg Kroah-Hartman1-1/+1
We want the staging/iio changes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-09-03iio: adc: meson_saradc: Simplify with dev_err_probe()Krzysztof Kozlowski1-5/+2
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20200829064726.26268-6-krzk@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2020-08-31iio: adc: meson-saradc: Use the parent device to look up the calib dataMartin Blumenstingl1-1/+1
On the older-gen 32-bit SoCs the meson-saradc driver is used to read the SoC temperature. This requires reading calibration data from the eFuse. Looking up the calibration data nvmem-cell requires the OF device_node pointer to be available in the struct device which is passed to devm_nvmem_cell_get(). This however got lost with commit 8cb631ccbb1952 ("iio: Remove superfluous of_node assignments") from indio_dev->dev. As devm_nvmem_cell_get() is called in the initialization phase the device_node is not yet available because the NVMEM cell is looked up before iio_device_register() is called (which would then set the device_node automatically). Use the parent device to look up the NVMEM cell instead to fix this issue. Fixes: 8cb631ccbb1952 ("iio: Remove superfluous of_node assignments") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2020-06-14iio: Remove superfluous of_node assignmentsLars-Peter Clausen1-1/+0
If a driver does not assign an of_node to a IIO device to IIO core will automatically assign the of_node of the parent device. This automatic assignment is done in the iio_device_register() function. There is a fair amount of drivers that currently manually assign the of_node of the IIO device. All but 4 of them can make use of the automatic assignment though. The exceptions are: * mxs-lradc-adc: Which uses the of_node of the parent of the parent. * stm32-dfsdm-adc, stm32-adc and stm32-dac: Which reference the of_node assigned to the IIO device before iio_device_register() is called. All other drivers are updated to use automatic assignment. This reduces the amount of boilerplate code involved in setting up the IIO device. The patch has mostly been auto-generated with the following semantic patch // <smpl> @exists@ expression indio_dev; expression parent; @@ indio_dev = \(devm_iio_device_alloc\|iio_device_alloc\)(&parent, ...) ... -indio_dev->dev.of_node = parent.of_node; @exists@ expression indio_dev; expression parent; @@ indio_dev = \(devm_iio_device_alloc\|iio_device_alloc\)(parent, ...) ... -indio_dev->dev.of_node = parent->of_node; // </smpl> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2020-06-14iio: remove explicit IIO device parent assignmentAlexandru Ardelean1-1/+0
This patch applies the semantic patch: @@ expression I, P, SP; @@ I = devm_iio_device_alloc(P, SP); ... - I->dev.parent = P; It updates 302 files and does 307 deletions. This semantic patch also removes some comments like '/* Establish that the iio_dev is a child of the i2c device */' But this is is only done in case where the block is left empty. The patch does not seem to cover all cases. It looks like in some cases a different variable is used in some cases to assign the parent, but it points to the same reference. In other cases, the block covered by ... may be just too big to be covered by the semantic patch. However, this looks pretty good as well, as it does cover a big bulk of the drivers that should remove the parent assignment. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2019-10-18iio: adc: meson_saradc: use devm_platform_ioremap_resourceJonathan Cameron1-3/+1
Avoid local boilerplate. Suggested by coccinelle via coccicheck. CHECK drivers/iio/adc/meson_saradc.c drivers/iio/adc/meson_saradc.c:1218:1-5: WARNING: Use devm_platform_ioremap_resource for base Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2019-09-08iio: adc: meson_saradc: Fix memory allocation orderRemi Pommarel1-5/+5
meson_saradc's irq handler uses priv->regmap so make sure that it is allocated before the irq get enabled. This also fixes crash when CONFIG_DEBUG_SHIRQ is enabled, as device managed resources are freed in the inverted order they had been allocated, priv->regmap was freed before the spurious fake irq that CONFIG_DEBUG_SHIRQ adds called the handler. Fixes: 3af109131b7eb8 ("iio: adc: meson-saradc: switch from polling to interrupt mode") Reported-by: Elie Roudninski <xademax@gmail.com> Signed-off-by: Remi Pommarel <repk@triplefau.lt> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Elie ROUDNINSKI <xademax@gmail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2019-06-16iio: adc: meson_saradc: update with SPDX Licence identifierNeil Armstrong1-7/+1
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2019-04-04iio: adc: meson-saradc: add support for Meson G12ANeil Armstrong1-0/+8
Add the SAR ADC driver for the Amlogic Meson-G12A SoC. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2019-01-05iio: adc: meson-saradc: enable the temperature sensor two more SoCsMartin Blumenstingl1-0/+33
Meson8b and Meson8m2 use the same logic to convert the ADC register value to celsius, which is different from Meson8: - Meson8 has different multiplier and divider values - Meson8 uses a 4-bit TSC (temperature sensor coefficient) which fits into the 4-bit field in the MESON_SAR_ADC_DELTA_10 register: MESON_SAR_ADC_DELTA_10_TS_C_MASK. Meson8b and Meson8m2 have a 5-bit TSC which requires writing the upper-most bit into the MESON_HHI_DPLL_TOP_0[9] register from the HHI register area. This adds support for the temperature sensor on the Meson8b and Meson8m2 SoCs by implementing the logic to write the upper-most TSC bit into the HHI register area. The SoC-specific values (temperature_trimming_bits, temperature_multiplier, temperature_divider) are added - these simply integrate into the existing infrastructure (which was implemented for Meson8) and thus require no further changes to the existing temperature calculation logic. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-11-25iio: adc: meson-saradc: fix internal clock namesMartin Blumenstingl1-4/+4
Before this patch we are registering the internal clocks (for example on Meson8b, where the SAR ADC IP block implements the divider and gate clocks) with the following names: - /soc/cbus@c1100000/adc@8680#adc_div - /soc/cbus@c1100000/adc@8680#adc_en This is bad because the common clock framework uses the clock to create a directory in <debugfs>/clk. With such name, the directory creation (silently) fails and the debugfs entry ends up being created at the debugfs root. With this change, the new clock names are: - c1108680.adc#adc_div - c1108680.adc#adc_en This matches the clock naming scheme used in the PWM, Ethernet and MMC drivers. It also fixes the problem with debugfs. The idea is shamelessly taken from commit b96e9eb62841c5 ("pwm: meson: Fix mux clock names"). Fixes: 3921db46a8c5bc ("iio: Convert to using %pOF instead of full_name") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-11-25iio: adc: meson-saradc: check for devm_kasprintf failureNicholas Mc Guire1-0/+6
devm_kasprintf() may return NULL on failure of internal allocation thus the assignments to init.name are not safe if not checked. On error meson_sar_adc_clk_init() returns negative values so -ENOMEM in the (unlikely) failure case of devm_kasprintf() should be fine here. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Fixes: 3adbf3427330 ("iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs") Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-11-11iio: adc: meson-saradc: add support for the chip's temperature sensorMartin Blumenstingl1-26/+203
Channel 6 of the SAR ADC can be switched between two inputs: SAR_ADC_CH6 input (an actual pad on the SoC) and the signal from the temperature sensor inside the SoC. To get usable results from the temperature sensor we need to read the corresponding calibration data from the eFuse and pass it to the SAR ADC registers. If the temperature sensor is not calibrated (the eFuse data contains a bit for this) then the driver will only register the iio_chan_spec's for voltage measurements. This only enables the temperature sensor for the Meson8 SoC. Meson8b and Meson8m2 SoCs can be supported in the future as well but we first need a way to pass the fifth TSC (temperature sensor coefficient) bit to the HHI register area (apart from that the infrastructure as already implemented for Meson8 can be used). On the 64-bit SoCs (GXBB, GXL and GXM) the temperature sensor inside SAR ADC is firmware-controlled (by BL30, we can simply use the SCPI hwmon driver to get the chip temperature). To keep the devicetree interface backwards compatible we simply skip the temperature sensor initialization if no eFuse nvmem cell is passed via devicetree. The public documentation for the SAR ADC IP block does not explain how to use the registers to read the temperature. The logic from this patch is based on reading and understanding Amlogic's GPL kernel sources. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-09-29iio: adc: meson-saradc: use the address attribute from iio_chan_specMartin Blumenstingl1-14/+15
Until now the "channel" number is identical to how the channel is identified inside the (FIFO) registers. In our case we have eight channels and the hardware also has eight inputs. However, there are two special inputs: - channel 6 can select between the SAR_ADC_CH6 pad and the chip's internal temperature sensor - channel 7 can select between SAR_ADC_CH7 and VSS, VDD / 4, VDD / 2, VDD * 3 / 4 and VDD. When programming the registers to read for example the temperature sensor we have to select FIFO channel 6, set the correct bit which muxes channel 6 to the temperature sensor and then start the ADC measurement for channel 6 as usual. When we add support for the temperature sensor the driver has to know about that it has to use FIFO channel 6 to measure using the chip's internal temperature sensor. However, in that case the iio_chan_spec channel will not be 6 because this is already used for the SAR_ADC_CH6 pad input. Thus we use iio_chan_spec's address field to store the FIFO channel number for each channel. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-09-29iio: adc: meson-saradc: do not use meson_sar_adc_iio_channels directlyMartin Blumenstingl1-2/+2
In the future we may support two different channel sets: - one which includes the voltage pads and the temperature sensor output (for Meson8, Meson8b and Meson8m2) - one which only includes the voltage pads (GXBB, GXL, GXM and AXG) Channel 7 has a special function on all of these platforms. However, since we will have different channel array definitions we want our code to always use whatever channels struct iio_dev uses. No functional changes for now. This is the preparation for adding temperature sensor support to this driver. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-09-29iio: adc: meson-saradc: simplify access to meson_sar_adc_paramMartin Blumenstingl1-14/+14
Commit 053ffe3c8cfe31 ("iio: adc: meson-saradc: squash and share the common adc platform data") put all the data which is needed at runtime from struct meson_sar_adc_data to a new struct meson_sar_adc_param so we can re-use the platform specific configuration without having to duplicate everything just to change the name. The only place where struct meson_sar_adc_data is now needed is the _probe function which has to pass the name to the iio_dev. All other functions only need access to struct meson_sar_adc_param. This means we can simplify struct meson_sar_adc_priv. The goal of this patch is to make the code a bit easier to read since this removes one level of nesting. No functional changes intended. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-09-29iio: adc: meson-saradc: use of_device_get_match_dataMartin Blumenstingl1-5/+5
This simplifies our _probe function by using of_device_get_match_data instead of open-coding it. No functional changes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-09-29iio: adc: meson-saradc: remove #define MESON_SAR_ADC_DELTA_10_TS_C_SHIFTMartin Blumenstingl1-1/+0
This define is of no use because the driver is avoiding shifting bits by itself but using FIELD_GET/FIELD_PREP (which are using bit masks) instead. There is already a MESON_SAR_ADC_DELTA_10_TS_C_MASK bit mask so MESON_SAR_ADC_DELTA_10_TS_C_SHIFT was redundant. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-07-23iio: adc: meson-saradc: add support for the Meson8m2 SoCsMartin Blumenstingl1-0/+9
The SAR ADC on Meson8m2 behaves identical to the one found in the Meson8b SoCs. Add a separate compatible string because the temperature sensor logic (not supported yet) differs between Meson8 and Meson8m2 (however, it's the same for Meson8b and Meson8m2). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-05-11Merge tag 'iio-for-4.18a' of ↵Greg Kroah-Hartman1-33/+50
git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next Jonathan writes: 1st round of IIO new device support, features and cleanup for the 4.18 cycle A nice mix this time of excellent cleanups (many to send drivers speeding toward staging graduations) and new drivers / device support. A good part of this is Brian Masney's never ending task on the tsl2x7x driver. The end is in sight so hopefully we'll get that one out of staging very soon! New device support * AD5686 - Support AD5685R (was wrongly present as AD5685) - Support AD5672R, AD5676, AD5676, AD5684R and AD5686R 4 and 8 channel SPI DACs with various precisions. - Support AD5671R, AD5675R, AD5694, AD5694R, AD5695R, AD5696 and AD5696R I2C DACs with various percisions and numbers of channels. * Analog front end rescale driver - New driver. - Support current sensing usings a shunt resistor. - Support simple voltage dividers. - support simple current sense amplifiers. * TI dac5571 - New driver and device bindings supporting: dac5571, dac6571, dac7571, dac5574, dac6574, dac7574, dac5573, dac6573 and dac7573 * Meson-adc - Support for Meson AXG with DT bindings. * mpu6050 - Support the mpu9255 which only requires additional WHOAMI entry and compatible string. * st_lsm6dsx - Support for lsm330dlc combinded accelerometer and gyro sensors with DT bindings. * stm32_adc - Add support for STM32MP1 with bindings. Staging graduations * adis16201 after some excelent cleanup by Himanshu Jha. * adis16029 after some excelent cleanup by Shreeya Patel. New features: * ABI docs - Add core ABI docs for angle channels. * inv_mpu6050 - Provide support for the full range of interrupts the device supports. * st_accel - Add SMO8840 ACPI ID seen in the wild on some Lenovo machines. * stx104 - Provide a multiple gpio get function. Cleanups / Minor fixes * core - Use new nested structure support to improve kernel-doc. * ad2s1200 - Use be16_to_cpup instead of opencoding. * ad5686 - Indentation tidy up. - Switch to SPDX - Refactor to allow various numbers of channels. - Refactor to separate core and SPI specific support, prior to addition of i2c equivalent devices. * ad7606 - Use drvdata directly from device rather than boucing via the platform_device structure. * ad7746 - Replace opencoded byte swapped i2c calls with _swapped variants. - White space and line break readability improvements. - Reorder includes and variable declarations where appropriate. * ad7791 - Changes to the AD ADC library used by this driver took in the sampling frequency. This lead to be the wrong path being the one tied to the resulting attribute, so it didn't work, and a warning to be printed. * ad7780 - Remove apparent support for sampling frequency control on devices that don't support changing the sampling attributes. * ade7854 - Fix a read of the wrong number of bits. - Improve error handling on i2c read/write errors. - Rework i2c and spi code to reduce duplication. * adis16201 (staging) - Improve meaning inherent in some macro names by adding units etc where relevant. - Adjust comments to improve detail and drop the irrelevant. - Rename register address definitions definitions to add a _REG postfix, clearly separating them from field definitions. Reorganize the definitions to group register address and fields. - Use sign_extend32 rather than open coding. - Reverse Xmas tree ordering where appropriate and align function args. - Remove unused headers. - Use GENMASK where appropriate instead of open coding. * adis16209 (staging) - Indent field definitions to visually separate them from register address definitions. - Use reverse xmas tree ordering where appropriate. - Add some whitespace where it will help readability. - Drop some unused headers. - Use GENMASK where appropriate. * ad2s1200 - Drop unnecessary includes and reorder alphabetically. - Reverse xmas tree and blank line cleanups. * atlas-ph-sensor - Use msleep instead of usleep_range where the precise value doesn't matter and the delays are long. * bcm150 - Drop transaction splitting as core now handles it. * cros_ec - Move the shared header to the include/iio/common directory. This brings it inline with the other multiple type devices. - Use drvdata directly from device rather than boucing via the platform_device structure. * hid-sensors - Use drvdata directly from device rather than boucing via the platform_device structure. * inv_mpu6050 - Clear out a second function definition for the same function. - Don't flush fifo when the iio buffer is full but just drop excess data. - Tidy up set_power_itg and ensure it is used in the right places. - Use set_power_itg rather than opencoding it again in the i2c mux control. - Make sure error paths disable the power if undoing power on. - Used managed devm_ functions during probe. Delete remove function. - Refactor to pull raw data read out of read_raw function. - Simplify data reading error paths. - Only enable the i2c mux for chips with the i2c aux bus (not icm20608) - Fix a potential deadlock due to varying lock ordering. - Fix an issue where first sample from gyro after enabling is unstable by dropping the first sample. - Fix an issue where the user_ctrl register is incorrectly overwritten. - Tidy up some grammar and spelling minor issus. * mcp320x - Use vendor compatible strings. * mcp4018 - Switch to using i2c .probe_new. * mcp4351 - switch to using i2c .probe_new. * meson-adc - rework handing on common ADC platform data so it can be shared across multiple families of SoCs. * sca3000 - Fix an error handling path if the ring configure fails. * st_lsm6dsx - Fix a wrong fifo threshold mask (no actual effect) * stm32-dfsdm - Style fixes and cleanups. - Check filter ID is in range and check spi-max-frequency. * tsl2x7x (staging) - Drop some unnecessary function calls, unused variables and unnecessary local variables. - Fix wrong interrupt type. - Avoid unnecessary double clear of interrupt. - Simplify proximity calibration call which did various things unrelated to actually calibrating. - Separate control of the proximity and ALS interrupts. - Improve consistency of logging. - Separate ALS and proximity persistence settings as they have separate hardware controls. - Tidy up variable ordering. - Add Brian to copyright notice given consider work on this driver. - Take advantage of hardware support for I2C address auto increment. - Combine individuaal enable and period attributes for the two directions on the threshold events into a single value as the hardware doesn't separate them. - Move integration_time* attributes from light channel to intensity value as they effect the intensity readings directly and the light reading only indirectly. Hence this better reflects reality. Also move the calibscale_available. - Avoid returning an error in the IRQ handler. - Hard code the reg value in _clear_interrupts as it only takes one value in the code. Result is the function has little purpose so opencode the two remaining i2c_smbus_write_byte calls. - Drop some unnecessary checking of the chip status register. - Tidy up return path in _write_interrupt_config. - Tidy up the ID verification code. - Move the power and diode settings defines into the header as these are needed for platform data configuration. - Various renames and comment cleanups for consistency and clarity. - Use actual device defaults for default startup settings. - SPDX - Add some range sanity checking to sysfs attribute writes. - Don't provide event interfaces if the interrupt line isn't available. - Use IIO_CONST_ATTR macro for calibscale_available as it's a constant string. - Fix the integration time and lux equations. - Make device IDs explicit index values in the device_channel_config array.
2018-03-30iio: adc: meson-saradc: add support for Meson AXGXingyu Chen1-0/+8
Add the SAR ADC driver for the Amlogic Meson-AXG SoC. Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-03-30iio: adc: meson-saradc: squash and share the common adc platform dataYixun Lan1-33/+42
Extract and promote common adc platform data into a new structure, to make it better share the info between several SoCs, this will avoid duplicating the code all over the place, Save a few memory and make the code more maintainable. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-03-10iio: adc: meson-saradc: unlock on error in meson_sar_adc_lock()Dan Carpenter1-1/+3
The meson_sar_adc_lock() function is not supposed to hold the "indio_dev->mlock" on the error path. Fixes: 3adbf3427330 ("iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-01-08iio: adc: meson-saradc: program the channel muxes during initializationMartin Blumenstingl1-3/+29
On some Meson8 devices the channel muxes are not programmed. This results in garbage values when trying to read channels that are not set up. Fix this by initializing the channel 0 and 1 muxes in MESON_SAR_ADC_CHAN_10_SW as well as the muxes for all other channels in MESON_SAR_ADC_AUX_SW based on what the vendor driver does (which is simply a 1:1 mapping of channel number and channel mux). This only showed up on Meson8 devices, because for GXBB and newer BL30 is taking care of initializing the channel muxes. This additionally fixes a typo in the MESON_SAR_ADC_AUX_SW_MUX_SEL_CHAN_MASK macro because the old definition assumed that the register fields were 2 bit wide, while they are actually 3 bit wide. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-01-08iio: adc: meson-saradc: fix the clock frequency on Meson8 and Meson8bMartin Blumenstingl1-1/+7
GX SoCs use a 1.2 MHz ADC clock, while the older SoCs use a 1.14 MHz clock. A comment in the driver from Amlogic's GPL kernel says that it's running at 1.28 MHz. However, it's actually programming a divider of 20 + 1. With a XTAL clock of 24 MHz this results in a frequency of 1.14 MHz. (their calculation might be based on a 27 MHz XTAL clock, but this is not what we have on the Meson8 and Meson8b SoCs). The ADC was still working with the 1.2MHz clock. In my own tests I did not see a difference between 1.2 and 1.14 MHz (regardless of the clock frequency used, the ADC results were identical). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-12-06Merge Linus's staging merge point into staging-nextGreg Kroah-Hartman1-10/+42
This resolves the merge issue pointed out by Stephen in drivers/iio/adc/meson_saradc.c. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-12-02iio: adc: meson-saradc: remove irrelevant clock "sana"Xingyu Chen1-20/+0
The "sana" clock is not used at SAR ADC module in Amlogic Meson SoC, it is irrelevant for the SAR ADC. Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2017-12-02iio: adc: meson-saradc: Meson8 and Meson8b do not have REG11 and REG13Martin Blumenstingl1-2/+15
The Meson GXBB and newer SoCs have a few more registers than the older Meson8 and Meson8b SoCs. Use a separate regmap config to limit the older SoCs to the DELTA_10 register. Fixes: 6c76ed31cd05 ("iio: adc: meson-saradc: add Meson8b SoC compatibility") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2017-12-02iio: adc: meson-saradc: initialize the bandgap correctly on older SoCsMartin Blumenstingl1-7/+26
Meson8 and Meson8b do not have the MESON_SAR_ADC_REG11 register. The bandgap setting for these SoCs is configured in the MESON_SAR_ADC_DELTA_10 register instead. Make the driver aware of this difference and use the correct bandgap register depending on the SoC. This has worked fine on Meson8 and Meson8b because the bootloader is already initializing the bandgap setting. Fixes: 6c76ed31cd05 ("iio: adc: meson-saradc: add Meson8b SoC compatibility") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2017-12-02iio: adc: meson-saradc: fix the bit_idx of the adc_en clockMartin Blumenstingl1-1/+1
Meson8 and Meson8b SoCs use the the SAR ADC gate clock provided by the MESON_SAR_ADC_REG3 register within the SAR ADC register area. According to the datasheet (and the existing MESON_SAR_ADC_REG3_CLK_EN definition) the gate is on bit 30. The fls() function returns the last set bit, which is "bit index + 1" (fls(MESON_SAR_ADC_REG3_CLK_EN) returns 31). Fix this by switching to __ffs() which returns the first set bit, which is bit 30 in our case. This off by one error results in the ADC not being usable on devices where the bootloader did not enable the clock. Fixes: 3adbf3427330 ("iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2017-08-22iio:adc: drop assign iio_info.driver_module and iio_trigger_ops.ownerJonathan Cameron1-1/+0
The equivalent of both of these are now done via macro magic when the relevant register calls are made. The actual structure elements will shortly go away. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>
2017-07-22iio: Convert to using %pOF instead of full_nameRob Herring1-4/+4
Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Jonathan Cameron <jic23@kernel.org> Cc: Hartmut Knaack <knaack.h@gmx.de> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Peter Meerwald-Stadler <pmeerw@pmeerw.net> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: linux-iio@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2017-07-09iio: adc: meson-saradc: add NULL check on of_match_device() return valueGustavo A. R. Silva1-0/+5
Check return value from call to of_match_device() in order to prevent a NULL pointer dereference. In case of NULL print error message and return -ENODEV Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2017-06-20Merge 4.12-rc6 into staging-nextGreg Kroah-Hartman1-2/+2
We want the staging fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-11iio: adc: meson-saradc: fix potential crash in meson_sar_adc_clear_fifoMartin Blumenstingl1-2/+2
meson_sar_adc_clear_fifo passes a 0 as value-pointer to regmap_read(). In case of the meson-saradc driver this ends up in regmap_mmio_read(), where the value-pointer is de-referenced unconditionally to assign the value which was read. Fix this by passing an actual pointer, even though all we want to do is to discard the value. As a side-effect this fixes a sparse warning ("Using plain integer as NULL pointer") as reported by Paolo Cretaro. Fixes: 3adbf3427330 ("iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs") Reported-by: Paolo Cretaro <paolocretaro@gmail.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-05-07iio: adc: meson-saradc: add Meson8b SoC compatibilityMartin Blumenstingl1-24/+56
Meson GX SoCs however use some magic bits to prevent simultaneous (= conflicting, because only consumer should use the FIFO buffer with the ADC results) usage by the Linux kernel and the bootloader (the BL30 bootloader uses the SAR ADC to read the CPU temperature). This patch changes guards all BL30 functionality so it is skipped on SoCs which don't have it. Since the hardware itself doesn't know whether BL30 is available the internal meson_sar_adc_data is extended so this information can be provided per of_device_id.data inside the driver. Additionally the clocks "adc_clk" and "adc_sel" are not provided by the clock-controller itself. "adc_sel" is not available at all. "adc_clk" is provided by the SAR ADC IP block itself on Meson8b (and earlier). This is already supported by the meson_saradc driver. Finally this introduces new of_device_ids for the Meson8 and Meson8b SoCs so the driver can be wired up in the corresponding DT. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-05-07iio: adc: meson-saradc: mark all meson_sar_adc_data static and constMartin Blumenstingl1-3/+3
These are only passed as of_device_id.data and never modified. Thus we can mark them as static const, just like the of_device_id instances where they are used. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-03-25iio: adc: meson-saradc: add calibrationHeiner Kallweit1-2/+75
This patch adds calibration for the Meson SAR ADC. Points 25% vref and 75% vref are used for calibration. It uses a simple linear calibration function: SCALE * val + BIAS Successfully tested on a Odroid C2. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-02-19iio: adc: meson-saradc: improve meson_sar_adc_read_raw_sampleHeiner Kallweit1-19/+17
After sampling there should always be only one value in the FIFO. This also applies to averaging mode as the averaging is done chip-internally. So we don't have to loop and let the driver complain if there's not exactly one value in the FIFO. If the value belongs to a different channel then don't silently swallow the value but complain. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-02-19iio: adc: meson-saradc: switch from polling to interrupt modeHeiner Kallweit1-5/+51
Switch from polling to interrupt mode. Successfully tested on a S905GXBB-based Odroid C2. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-01-28iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCsMartin Blumenstingl1-0/+922
This adds support for the SAR (Successive Approximation Register) ADC on the Amlogic Meson SoCs. The code is based on the public S805 (Meson8b) and S905 (GXBB) datasheets (see [0] and [1]), as well as by reading (various versions of) the vendor driver and by inspecting the registers on the vendor kernels of my testing-hardware. Currently the GXBB, GXL and GXM SoCs are supported. GXBB hardware has 10-bit ADC resolution, while GXL and GXM have 12-bit ADC resolution. The code was written to support older SoCs (Meson8 and Meson8b) as well, but due to lack of actual testing-hardware no of_device_id was added for these. Two "features" from the vendor driver are currently missing: - the vendor driver uses channel #7 for calibration (this improves the accuracy of the results - in my tests the results were less than 3% off without calibration compared to the vendor driver). Adding support for this should be easy, but is not required for most applications. - channel #6 is connected to the SoCs internal temperature sensor. Adding support for this is probably not so easy since (based on the u-boot sources) most SoC versions are using different registers and algorithms for the conversion from "ADC value" to temperature. Supported by the hardware but currently not supported by the driver: - reading multiple channels at the same time (the hardware has a FIFO buffer which stores multiple results) - continuous sampling (this would require a way to enable this individually because otherwise the ADC would be drawing power constantly) - interrupt support (similar to the vendor driver this new driver is polling the results. It is unclear if the IRQ-mode is supported on older (Meson6 or Meson8) hardware as well or if there are any errata) [0] http://dn.odroid.com/S805/Datasheet/S805_Datasheet%20V0.8%2020150126.pdf [1] http://dn.odroid.com/S905/DataSheet/S905_Public_Datasheet_V1.1.4.pdf Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-17 20:25:56 +0000