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AgeCommit message (Expand)AuthorFilesLines
2016-01-03i2c: imx: init bus recovery info before adding i2c adapterGao Pan1-2/+2
2016-01-02i2c: rcar: disable PM in multi-master modeWolfram Sang1-3/+14
2016-01-02i2c: rcar: remove macros dealing with flagsWolfram Sang1-13/+9
2016-01-02i2c: img-scb: support repeated starts on IP v3.3Sifan Naeem1-9/+36
2016-01-02i2c: img-scb: add handle for Master halt interruptSifan Naeem1-3/+14
2016-01-02i2c: img-scb: add handle for stop detected interruptSifan Naeem1-1/+10
2016-01-02i2c: img-scb: remove fifo EMPTYING interrupts handleSifan Naeem1-13/+3
2016-01-02i2c: img-scb: support I2C_M_IGNORE_NAKSifan Naeem1-5/+10
2015-12-17i2c: make i2c_parse_fw_timings() always visibleWolfram Sang1-52/+52
2015-12-17i2c: emev: select I2C slave supportWolfram Sang1-0/+1
2015-12-16i2c: xlr: add interrupt support for Sigma Designs chipsMåns Rullgård1-0/+119
2015-12-16i2c: xlr: fix extra read/write at end of rx transferMåns Rullgård1-23/+27
2015-12-15i2c: xlr: add support for Sigma Designs controller variantMåns Rullgård2-7/+80
2015-12-14i2c: uniphier_f: error out if bus speed is zeroMasahiro Yamada1-0/+5
2015-12-14i2c: uniphier_f: error out if clock rate is zeroMasahiro Yamada1-1/+5
2015-12-14i2c: uniphier: error out if bus speed is zeroMasahiro Yamada1-0/+5
2015-12-14i2c: uniphier: error out if clock rate is zeroMasahiro Yamada1-1/+5
2015-12-14i2c: rcar: honor additional i2c timings from DTWolfram Sang1-9/+12
2015-12-14i2c: rcar: switch to i2c generic dt parsingWolfram Sang1-7/+9
2015-12-14i2c: rcar: refactor probe function a littleWolfram Sang1-23/+17
2015-12-14i2c: add generic routine to parse DT for timing informationWolfram Sang1-0/+53
2015-12-05i2c: emev2: add slave supportNiklas Söderlund1-1/+111
2015-12-03i2c: eg20t: allow build on MIPS platformsPaul Burton1-1/+1
2015-12-03i2c: eg20t: set i2c_adapter->dev.of_nodePaul Burton1-0/+1
2015-12-03i2c: at91: add support for the HOLD fieldLudovic Desroches1-3/+50
2015-12-03i2c: piix4: remove unneeded assignmentsWolfram Sang1-2/+2
2015-12-01i2c: mediatek: add i2c first write then read optimizationLiguo Zhang1-6/+27
2015-11-30i2c: cadence: Remove the suspended flagShubhrajyoti Datta1-6/+1
2015-11-30i2c: cadence: Move to sensible power managementShubhrajyoti Datta1-21/+45
2015-11-30i2c: bcm2835: add I2C_AQ_NO_CLK_STRETCHNicola Corna1-0/+10
2015-11-30i2c: algo-bit: add I2C_AQ_NO_CLK_STRETCHNicola Corna1-0/+6
2015-11-30i2c: xiic: Replace spinlock with mutexLars-Peter Clausen1-6/+6
2015-11-30i2c: taos-evm: replace simple_strtoul by kstrtou8LABBE Corentin1-1/+7
2015-11-30i2c: piix4: Add adapter port name support for SB800 chipsetChristian Fetzer1-4/+12
2015-11-30i2c: piix4: Add support for multiplexed main adapter in SB800Christian Fetzer1-22/+147
2015-11-30i2c: piix4: Convert piix4_main_adapter to arrayChristian Fetzer1-5/+12
2015-11-30i2c: rcar: handle difference in setting up non-first messageWolfram Sang1-5/+16
2015-11-30i2c: rcar: clean up after refactoringWolfram Sang1-23/+9
2015-11-30i2c: rcar: revoke START request earlyWolfram Sang1-16/+7
2015-11-30i2c: rcar: check master irqs before slave irqsWolfram Sang1-8/+5
2015-11-30i2c: rcar: don't issue stop when HW does it automaticallyWolfram Sang1-2/+2
2015-11-30i2c: rcar: init new messages in irqWolfram Sang1-47/+43
2015-11-30i2c: rcar: refactor setup of a msgWolfram Sang1-6/+9
2015-11-30i2c: rcar: remove spinlockWolfram Sang1-19/+4
2015-11-30i2c: rcar: remove unused IOERROR stateWolfram Sang1-6/+0
2015-11-30i2c: rcar: rework hw initWolfram Sang1-12/+4
2015-11-30i2c: rcar: make sure clocks are on when doing clock calculationWolfram Sang1-9/+17
2015-11-20i2c: i801: add Intel Lewisburg device IDsAlexandra Yates2-0/+7
2015-11-20i2c: fix wakeup irq parsingGrygorii Strashko1-1/+1
2015-11-20i2c: xiic: Prevent concurrent running of the IRQ handler and __xiic_start_xfer()Lars-Peter Clausen1-2/+1