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2016-11-24i2c: i801: remove SMBNTFDDAT reads as they always seem to return 0Benjamin Tissoires1-4/+6
On the platform tested, reading SMBNTFDDAT always returns 0 (using 1 read of a word or 2 of 2 bytes). Given that we are not sure why and that we don't need to rely on the data parameter in the current users of Host Notify, remove this part of the code. If someone wants to re-enable it, just revert this commit and data should be available. Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-24i2c: i801: use the BIT() macro for FEATURES_* alsoBenjamin Tissoires1-8/+8
no functional changes Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-24i2c: i801: use BIT() macro for bits definitionBenjamin Tissoires1-26/+26
i801 mixes hexadecimal and decimal values for defining bits. However, we have a nice BIT() macro for this exact purpose. No functional changes, cleanup only. Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-24i2c: i801: minor formatting issuesBenjamin Tissoires1-4/+2
No functional changes, just typos and remove unused #define. Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-24i2c: i801: store and restore the SLVCMD register at load and unloadBenjamin Tissoires1-1/+16
Also do not override any other configuration in this register. Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-24i2c: mlxcpld: add master driver for mellanox systemsVadim Pasternak3-0/+516
Device driver for Mellanox I2C controller logic, implemented in Lattice CPLD device. Device supports: - Master mode - One physical bus - Polling mode The Kconfig currently controlling compilation of this code is: drivers/i2c/busses/Kconfig:config I2C_MLXCPLD Signed-off-by: Michael Shych <michaelsh@mellanox.com> Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-18i2c: xlp9xx: ACPI support for I2C clientsTanmay Jagdale1-0/+1
The ACPI companion of the adapter has to be set for I2C controller code to read and attach the slave devices described in the ACPI table with the I2CSerialBus resource descriptor. Used ACPI_COMPANION_SET macro to set this. Signed-off-by: Tanmay Jagdale <tanmay.jagdale@broadcom.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-18i2c: uniphier-f: rename jump label to follow coding style guidelineMasahiro Yamada1-3/+3
Documentation/CodingStyle recommends to use label names which say what the goto does or why the goto exists. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-18i2c: uniphier: rename jump label to follow coding style guidelineMasahiro Yamada1-3/+3
Documentation/CodingStyle recommends to use label names which say what the goto does or why the goto exists. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-18i2c: designware: Allow reduce bus speed by "clock-frequency" propertyJarkko Nikula1-5/+10
Allow more flexibility to bus speed selection. Now if there are I2C slave connections defined in ACPI the speed of slowest device on the bus will define the bus speed. However if also "clock-frequency" device property is defined we should use the slowest of these two. This is targeted to maker boards where developer may want to connect slower I2C slave devices to the bus than defined in existing ACPI I2C slave connections. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-18i2c: designware: Implement support for SMBus block read and writeTin Huynh3-3/+45
Free and Open IPMI use SMBUS BLOCK Read/Write to support SSIF protocol. However, I2C Designware Core Driver doesn't handle the case at the moment. The below patch supports this feature. Signed-off-by: Tin Huynh <tnhuynh@apm.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-18i2c: constify i2c_adapter_quirks structuresJulia Lawall4-4/+4
Check for i2c_adapter_quirks structures that are only stored in the quirks field of an i2c_adapter structure. This field is declared const, so i2c_adapter_quirks structures that have this property can be declared as const also. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Ray Jui <ray.jui@broadcom.com> # for bcm-iproc Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-18i2c: i2c-pxa-pci; make explicitly non-modularPaul Gortmaker1-23/+9
The Kconfig currently controlling compilation of this code is: drivers/i2c/busses/Kconfig:config I2C_PXA_PCI drivers/i2c/busses/Kconfig: def_bool I2C_PXA && X86_32 && PCI && OF ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. We explicitly disallow a driver unbind, since that doesn't have a sensible use case anyway, and it allows us to drop the ".remove" code for non-modular drivers. Since module_pci_driver() uses the same init level priority as builtin_pci_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-07i2c: bcm2835: Add support for dynamic clockNoralf Trønnes1-19/+32
Support a dynamic clock by reading the frequency and setting the divisor in the transfer function instead of during probe. Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Reviewed-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-07i2c: bcm2835: Support i2c-dev ioctl I2C_TIMEOUTNoralf Trønnes1-3/+1
Use i2c_adapter->timeout for the completion timeout value. The core default is 1 second. Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-07i2c: bcm2835: Add support for Repeated Start ConditionNoralf Trønnes1-38/+63
Documentation/i2c/i2c-protocol states that Combined transactions should separate messages with a Start bit and end the whole transaction with a Stop bit. This patch adds support for issuing only a Start between messages instead of a Stop followed by a Start. This implementation differs from downstream i2c-bcm2708 in 2 respects: - it uses an interrupt to detect that the transfer is active instead of using polling. There is no interrupt for Transfer Active, but by not prefilling the FIFO it's possible to use the TXW interrupt. - when resetting/disabling the controller between transfers it writes CLEAR to the control register instead of just zero. Using just zero gave many errors. This might be the reason why downstream had to disable this feature and make it available with a module parameter. I have run thousands of transfers to a DS1307 (rtc), MMA8451 (accel) and AT24C32 (eeprom) in parallel without problems. Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Acked-by: Eric Anholt <eric@anholt.net> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-07i2c: bcm2835: Can't support I2C_M_IGNORE_NAKNoralf Trønnes1-4/+0
The controller can't support this flag, so remove it. Documentation/i2c/i2c-protocol states that all of the message is sent: I2C_M_IGNORE_NAK: Normally message is interrupted immediately if there is [NA] from the client. Setting this flag treats any [NA] as [A], and all of message is sent. >From the BCM2835 ARM Peripherals datasheet: The ERR field is set when the slave fails to acknowledge either its address or a data byte written to it. So when the controller doesn't receive an ack, it sets ERR and raises an interrupt. In other words, the whole message is not sent. Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-07i2c: bcm2835: Use dev_dbg logging on transfer errorsNoralf Trønnes1-1/+1
Writing to an AT24C32 generates on average 2x i2c transfer errors per 32-byte page write. Which amounts to a lot for a 4k write. This is due to the fact that the chip doesn't respond during it's internal write cycle when the at24 driver tries and retries the next write. Only a handful drivers use dev_err() on transfer error, so switch to dev_dbg() instead. Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-07i2c: bcm2835: Protect against unexpected TXW/RXR interruptsNoralf Trønnes1-9/+31
If an unexpected TXW or RXR interrupt occurs (msg_buf_remaining == 0), the driver has no way to fill/drain the FIFO to stop the interrupts. In this case the controller has to be disabled and the transfer completed to avoid hang. (CLKT | ERR) and DONE interrupts are completed in their own paths, and the controller is disabled in the transfer function after completion. Unite the code paths and do disabling inside the interrupt routine. Clear interrupt status bits in the united completion path instead of trying to do it on every interrupt which isn't necessary. Only CLKT, ERR and DONE can be cleared that way. Add the status value to the error value in case of TXW/RXR errors to distinguish them from the other S_LEN error. Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-07i2c: bcm2835: Fix hang for writing messages larger than 16 bytesNoralf Trønnes1-8/+14
Writing messages larger than the FIFO size results in a hang, rendering the machine unusable. This is because the RXD status flag is set on the first interrupt which results in bcm2835_drain_rxfifo() stealing bytes from the buffer. The controller continues to trigger interrupts waiting for the missing bytes, but bcm2835_fill_txfifo() has none to give. In this situation wait_for_completion_timeout() apparently is unable to stop the madness. The BCM2835 ARM Peripherals datasheet has this to say about the flags: TXD: is set when the FIFO has space for at least one byte of data. RXD: is set when the FIFO contains at least one byte of data. TXW: is set during a write transfer and the FIFO is less than full. RXR: is set during a read transfer and the FIFO is or more full. Implementing the logic from the downstream i2c-bcm2708 driver solved the hang problem. Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-10-25i2c: imx: defer probe if bus recovery GPIOs are not readyStefan Agner1-4/+7
Some SoC might load the GPIO driver after the I2C driver and using the I2C bus recovery mechanism via GPIOs. In this case it is crucial to defer probing if the GPIO request functions do so, otherwise the I2C driver gets loaded without recovery mechanisms enabled. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2016-10-25i2c: designware: Avoid aborted transfers with fast reacting I2C slavesJarkko Nikula1-3/+14
I2C DesignWare may abort transfer with arbitration lost if I2C slave pulls SDA down quickly after falling edge of SCL. Reason for this is unknown but after trial and error it was found this can be avoided by enabling non-zero SDA RX hold time for the receiver. By the specification SDA RX hold time extends incoming SDA low to high transition by n * ic_clk cycles but only when SCL is high. However it seems to help avoid above faulty arbitration lost error. Bits 23:16 in IC_SDA_HOLD register define the SDA RX hold time for the receiver. Be conservative and enable 1 ic_clk cycle long hold time in case boot firmware hasn't set it up. Reported-by: Jukka Laitinen <jukka.laitinen@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Jukka Laitinen <jukka.laitinen@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-10-25i2c: i801: Fix I2C Block Read on 8-Series/C220 and laterJean Delvare1-3/+13
Starting with the 8-Series/C220 PCH (Lynx Point), the SMBus controller includes a SPD EEPROM protection mechanism. Once the SPD Write Disable bit is set, only reads are allowed to slave addresses 0x50-0x57. However the legacy implementation of I2C Block Read since the ICH5 looks like a write, and is therefore blocked by the SPD protection mechanism. This causes the eeprom and at24 drivers to fail. So assume that I2C Block Read is implemented as an actual read on these chipsets. I tested it on my Q87 chipset and it seems to work just fine. Signed-off-by: Jean Delvare <jdelvare@suse.de> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> [wsa: rebased to v4.9-rc2] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-10-25i2c: xgene: Avoid dma_buffer overrunHoan Tran1-1/+1
SMBus block command uses the first byte of buffer for the data length. The dma_buffer should be increased by 1 to avoid the overrun issue. Reported-by: Phil Endecott <phil_gjouf_endecott@chezphil.org> Signed-off-by: Hoan Tran <hotran@apm.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2016-10-25i2c: digicolor: Fix module autoloadJavier Martinez Canillas1-0/+1
If the driver is built as a module, autoload won't work because the module alias information is not filled. So user-space can't match the registered device with the corresponding module. Export the module alias information using the MODULE_DEVICE_TABLE() macro. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-10-25i2c: xlr: Fix module autoload for OF registrationJavier Martinez Canillas1-0/+1
If the driver is built as a module, autoload won't work because the module alias information is not filled. So user-space can't match the registered device with the corresponding module. Export the module alias information using the MODULE_DEVICE_TABLE() macro. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-10-25i2c: xlp9xx: Fix module autoloadJavier Martinez Canillas1-0/+1
If the driver is built as a module, autoload won't work because the module alias information is not filled. So user-space can't match the registered device with the corresponding module. Export the module alias information using the MODULE_DEVICE_TABLE() macro. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-10-25i2c: jz4780: Fix module autoloadJavier Martinez Canillas1-0/+1
If the driver is built as a module, autoload won't work because the module alias information is not filled. So user-space can't match the registered device with the corresponding module. Export the module alias information using the MODULE_DEVICE_TABLE() macro. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-10-25i2c: allow configuration of imx driver for ColdFire architectureGreg Ungerer1-2/+2
The i2c controller used by Freescales iMX processors is the same hardware module used on Freescales ColdFire family of processors. We can use the existing i2c-imx driver on ColdFire family members. Modify the configuration to allow it to be selected when compiling for ColdFire targets. Signed-off-by: Greg Ungerer <gerg@linux-m68k.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-10-25i2c: rk3x: Give the tuning value 0 during rk3x_i2c_v0_calc_timingsDavid Wu1-0/+2
We found a bug that i2c transfer sometimes failed on 3066a board with stabel-4.8, the con register would be updated by uninitialized tuning value, it made the i2c transfer failed. So give the tuning value to be zero during rk3x_i2c_v0_calc_timings. Signed-off-by: David Wu <david.wu@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2016-10-25i2c: hix5hd2: allow build with ARCH_HISIRuqiang Ju1-4/+4
This driver should be buildable with ARCH_HISI, because some of other HiSilicon SoCs also use it. Signed-off-by: Ruqiang Ju <juruqiang@huawei.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-10-07Merge branch 'i2c/for-4.9' of ↵Linus Torvalds63-1174/+1622
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: "Here is the 4.9 pull request from I2C including: - centralized error messages when registering to the core - improved lockdep annotations to prevent false positives - DT support for muxes, gates, and arbitrators - bus speeds can now be obtained from ACPI - i2c-octeon got refactored and now supports ThunderX SoCs, too - i2c-tegra and i2c-designware got a bigger bunch of updates - a couple of standard driver fixes and improvements" * 'i2c/for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (71 commits) i2c: axxia: disable clks in case of failure in probe i2c: octeon: thunderx: Limit register access retries i2c: uniphier-f: fix misdetection of incomplete STOP condition gpio: pca953x: variable 'id' was used twice i2c: i801: Add support for Kaby Lake PCH-H gpio: pca953x: fix an incorrect lockdep warning i2c: add a warning to i2c_adapter_depth() lockdep: make MAX_LOCKDEP_SUBCLASSES unconditionally visible i2c: export i2c_adapter_depth() i2c: rk3x: Fix variable 'min_total_ns' unused warning i2c: rk3x: Fix sparse warning i2c / ACPI: Do not touch an I2C device if it belongs to another adapter i2c: octeon: Fix high-level controller status check i2c: octeon: Avoid sending STOP during recovery i2c: octeon: Fix set SCL recovery function i2c: rcar: add support for r8a7796 (R-Car M3-W) i2c: imx: make bus recovery through pinctrl optional i2c: meson: add gxbb compatible string i2c: uniphier-f: set the adapter to master mode when probing i2c: uniphier-f: avoid WARN_ON() of clk_disable() in failure path ...
2016-10-02Merge branches 'acpi-wdat' and 'acpi-ec'Rafael J. Wysocki1-1/+3
* acpi-wdat: watchdog: wdat_wdt: Fix warning for using 0 as NULL watchdog: wdat_wdt: fix return value check in wdat_wdt_probe() platform/x86: intel_pmc_ipc: Do not create iTCO watchdog when WDAT table exists i2c: i801: Do not create iTCO watchdog when WDAT table exists mfd: lpc_ich: Do not create iTCO watchdog when WDAT table exists ACPI / watchdog: Add support for WDAT hardware watchdog * acpi-ec: ACPI / EC: Fix issues related to boot_ec ACPI / EC: Fix a gap that ECDT EC cannot handle EC events ACPI / EC: Fix a memory leakage issue in acpi_ec_add() ACPI / EC: Cleanup first_ec/boot_ec code ACPI / EC: Enable event freeze mode to improve event handling for suspend process ACPI / EC: Add PM operations to improve event handling for suspend process ACPI / EC: Add PM operations to improve event handling for resume process ACPI / EC: Fix an issue that SCI_EVT cannot be detected after event is enabled ACPI / EC: Add EC_FLAGS_QUERY_ENABLED to reveal a hidden logic ACPI / EC: Add PM operations for suspend/resume noirq stage
2016-09-28i2c: i801: Do not create iTCO watchdog when WDAT table existsMika Westerberg1-1/+3
ACPI WDAT table is the preferred way to use hardware watchdog over the native iTCO_wdt. Windows only uses this table for its hardware watchdog implementation so we should be relatively safe to trust it has been validated by OEMs Prevent iTCO watchdog creation if we detect that there is ACPI WDAT table. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-09-24i2c: axxia: disable clks in case of failure in probeAlexey Khoroshilov1-2/+12
axxia_i2c_probe() does not disable clock in case of failure in i2c_add_adapter(). Also it ignores returned value from clk_prepare_enable(). Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-09-24i2c: octeon: thunderx: Limit register access retriesJan Glauber2-12/+19
Do not infinitely retry register readq and writeq operations in order to not lock up the CPU in case the TWSI gets stuck. Return -ETIMEDOUT in case of a failed data read. For all other cases just return so subsequent operations will fail. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-09-24i2c: uniphier-f: fix misdetection of incomplete STOP conditionMasahiro Yamada1-5/+11
Currently, the status register FI2C_SR is checked immediately after a STOP condition is issued in case of the deferred STOP condition. It takes typically 5-10 usec until the corresponding bits in the register are set, so the error check for "stop condition was not completed" is very likely to be false positive. Add wait code to relax the status register check. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-09-24i2c: i801: Add support for Kaby Lake PCH-HAndy Shevchenko1-0/+4
Intel Kaby Lake PCH-H has the same legacy SMBus host controller than Intel Sunrisepoint PCH. It also has same iTCO watchdog on the bus. Add Kaby Lake PCH-H PCI ID to the list of supported devices. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-09-22i2c: qup: skip qup_i2c_suspend if the device is already runtime suspendedSudeep Holla1-1/+2
If the i2c device is already runtime suspended, if qup_i2c_suspend is executed during suspend-to-idle or suspend-to-ram it will result in the following splat: WARNING: CPU: 3 PID: 1593 at drivers/clk/clk.c:476 clk_core_unprepare+0x80/0x90 Modules linked in: CPU: 3 PID: 1593 Comm: bash Tainted: G W 4.8.0-rc3 #14 Hardware name: Qualcomm Technologies, Inc. APQ 8016 SBC (DT) PC is at clk_core_unprepare+0x80/0x90 LR is at clk_unprepare+0x28/0x40 pc : [<ffff0000086eecf0>] lr : [<ffff0000086f0c58>] pstate: 60000145 Call trace: clk_core_unprepare+0x80/0x90 qup_i2c_disable_clocks+0x2c/0x68 qup_i2c_suspend+0x10/0x20 platform_pm_suspend+0x24/0x68 ... This patch fixes the issue by executing qup_i2c_pm_suspend_runtime conditionally in qup_i2c_suspend. Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2016-09-22i2c: rk3x: Fix variable 'min_total_ns' unused warningDavid Wu1-2/+1
This patch fixs the following warning: drivers/i2c/busses/i2c-rk3x.c: In function 'rk3x_i2c_v1_calc_timings': drivers/i2c/busses/i2c-rk3x.c:745:41: warning: variable 'min_total_ns' set but not used [-Wunused-but-set-variable] Reported-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-09-22i2c: rk3x: Fix sparse warningDavid Wu1-1/+1
This patch fixes the following sparse warning: drivers/i2c/busses/i2c-rk3x.c:888:17: warning: cast truncates bits from constant value (ffffffffff00 becomes ffffff00) Reported-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-09-21i2c: octeon: Fix high-level controller status checkJan Glauber1-9/+14
In case the high-level controller (HLC) is used the status code is reported at a different location. Check that location after HLC write operations if the ready bit is not set and return an appropriate error code instead of always returning -EAGAIN. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-09-21i2c: octeon: Avoid sending STOP during recoveryDmitry Bazhenov1-4/+14
Due to a bug in the ThunderX I2C hardware sending STOP during a recovery attempt could lock up the hardware. To work around this problem do not send STOP at the beginning of the recovery but use the override registers to bring the TWSI including the high-level controller out of the bad state. Signed-off-by: Dmitry Bazhenov <dmitry.bazhenov@auriga.com> Signed-off-by: Jan Glauber <jglauber@cavium.com> [Changed commit message] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-09-21i2c: octeon: Fix set SCL recovery functionDmitry Bazhenov1-1/+1
The set SCL recovery function unconditionally pulls the SCL line low. Only pull SCL line low according to val parameter. Signed-off-by: Dmitry Bazhenov <dmitry.bazhenov@auriga.com> Signed-off-by: Jan Glauber <jglauber@cavium.com> [Changed commit message] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-09-21i2c-eg20t: fix race between i2c init and interrupt enableYadi.hu1-7/+11
the eg20t driver call request_irq() function before the pch_base_address, base address of i2c controller's register, is assigned an effective value. there is one possible scenario that an interrupt which isn't inside eg20t arrives immediately after request_irq() is executed when i2c controller shares an interrupt number with others. since the interrupt handler pch_i2c_handler() has already active as shared action, it will be called and read its own register to determine if this interrupt is from itself. At that moment, since base address of i2c registers is not remapped in kernel space yet,so the INT handler will access an illegal address and then a error occurs. Signed-off-by: Yadi.hu <yadi.hu@windriver.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2016-09-16i2c: rcar: add support for r8a7796 (R-Car M3-W)Ulrich Hecht1-0/+1
Same as r8a7795. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-09-15i2c: imx: make bus recovery through pinctrl optionalYang Li1-9/+22
Since commit 1c4b6c3bcf30 ("i2c: imx: implement bus recovery") the driver starts to use gpio/pinctrl to support optional bus recovery feature. But pinctrl is not always usable. There are platforms such as ls1021a and ls1043a that don't support pinctrl, and it could just be broken due to old/broken device tree. The patch makes it really optional that the probe function won't bailout on pinctrl problems instead it just disables bus recovery and prints out notification when there is problem with pinctrl. Since pinctrl is only used by bus recovery in this driver, move pinctrl initialization into bus recovery init function to prevent confusion. Signed-off-by: Li Yang <leoyang.li@nxp.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-09-15i2c: meson: add gxbb compatible stringNeil Armstrong1-0/+1
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-09-08i2c: rk3x: Restore clock settings at resume timeDoug Anderson1-0/+12
Depending on a number of factors including: - Which exact Rockchip SoC we're working with - How deep we suspend - Which i2c port we're on We might lose the state of the i2c registers at suspend time. Specifically we've found that on rk3399 the i2c ports that are not in the PMU power domain lose their state with the current suspend depth configured by ARM Tursted Firmware. Note that there are very few actual i2c registers that aren't configured per transfer anyway so all we actually need to re-configure are the clock config registers. We'll just add a call to rk3x_i2c_adapt_div() at resume time and be done with it. NOTE: On rk3399 on ports whose power was lost, I put printouts in at resume time. I saw things like: before: con=0x00010300, div=0x00060006 after: con=0x00010200, div=0x00180025 Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: David Wu <david.wu@rock-chips.com> Tested-by: David Wu <david.wu@rock-chips.com> [wsa: removed duplicate const] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-09-08i2c: uniphier-f: set the adapter to master mode when probingMasahiro Yamada1-6/+10
Currently, the adapter is set to the master mode at the first use. Since then, it is kept in the slave mode, so unexpected glitch signals on the I2C lines may cause the adapter into insane state. Setting it to the master mode along with initialization solves the problem. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reported-by: Akio Noda <noda.akio@socionext.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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