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2014-06-05drm/dp: add a hw mutex around the transfer functions. (v2)Dave Airlie2-3/+4
This should avoid races between connector probing and HPD irqs in the future, currently mode_config.mutex blocks this possibility. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-06-04drm: Split connection_mutex out of mode_config.mutex (v3)Daniel Vetter1-0/+1
After the split-out of crtc locks from the big mode_config.mutex there's still two major areas it protects: - Various connector probe states, like connector->status, EDID properties, probed mode lists and similar information. - The links from connector->encoder and encoder->crtc and other modeset-relevant connector state (e.g. properties which control the panel fitter). The later is used by modeset operations. But they don't really care about the former since it's allowed to e.g. enable a disconnected VGA output or with a mode not in the probed list. Thus far this hasn't been a problem, but for the atomic modeset conversion Rob Clark needs to convert all modeset relevant locks into w/w locks. This is required because the order of acquisition is determined by how userspace supplies the atomic modeset data. This has run into troubles in the detect path since the i915 load detect code needs _both_ protections offered by the mode_config.mutex: It updates probe state and it needs to change the modeset configuration to enable the temporary load detect pipe. The big deal here is that for the probe/detect users of this lock a plain mutex fits best, but for atomic modesets we really want a w/w mutex. To fix this lets split out a new connection_mutex lock for the modeset relevant parts. For simplicity I've decided to only add one additional lock for all connector/encoder links and modeset configuration states. We have piles of different modeset objects in addition to those (like bridges or panels), so adding per-object locks would be much more effort. Also, we're guaranteed (at least for now) to do a full modeset if we need to acquire this lock. Which means that fine-grained locking is fairly irrelevant compared to the amount of time the full modeset will take. I've done a full audit, and there's just a few things that justify special focus: - Locking in drm_sysfs.c is almost completely absent. We should sprinkle mode_config.connection_mutex over this file a bit, but since it already lacks mode_config.mutex this patch wont make the situation any worse. This is material for a follow-up patch. - omap has a omap_framebuffer_flush function which walks the connector->encoder->crtc links and is called from many contexts. Some look like they don't acquire mode_config.mutex, so this is already racy. Again fixing this is material for a separate patch. - The radeon hot_plug function to retrain DP links looks at connector->dpms. Currently this happens without any locking, so is already racy. I think radeon_hotplug_work_func should gain mutex_lock/unlock calls for the mode_config.connection_mutex. - Same applies to i915's intel_dp_hot_plug. But again, this is already racy. - i915 load_detect code needs to acquire this lock. Which means the w/w dance due to Rob's work will be nicely contained to _just_ this function. I've added fixme comments everywhere where it looks suspicious but in the sysfs code. After a quick irc discussion with Dave Airlie it sounds like the lack of locking in there is due to sysfs cleanup fun at module unload. v1: original (only compile tested) v2: missing mutex_init(), etc (from Rob Clark) v3: i915 needs more care in the conversion: - Protect the edp pp logic with the connection_mutex. - Use connection_mutex in the backlight code due to get_pipe_from_connector. - Use drm_modeset_lock_all in suspend/resume paths. - Update lock checks in the overlay code. Cc: Alex Deucher <alexdeucher@gmail.com> Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-06-04drm/radeon: replace drm_get_connector_name() with direct name field useJani Nikula3-14/+19
Generated using semantic patch: @@ expression E; @@ - drm_get_connector_name(E) + E->name [airlied: regenerated] Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-06-04drm/radeon: rework page flip handling v4Christian König3-112/+147
Instead of trying to flip inside the vblank period when the buffer is idle, offload blocking for idle to a kernel thread and program the flip directly into the hardware. v2: add error handling, fix EBUSY handling v3: add proper exclusive_lock handling v4: update crtc->primary->fb when the flip actually happens Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-06-04Revert "drm/radeon: rework page flip handling v3"Dave Airlie3-150/+115
This reverts commit 1aab5514ca9604e0263f658a067da0189c86a35b. Apply the fixed up version instead.
2014-06-02drm/radeon: Limit hdmi deep color bit depth to 12 bpc.Mario Kleiner1-0/+25
DCE-4/5/6 can't support more than 12 bpc deep color over hdmi, so clamp to 12 bpc when a hdmi deep color capable display is connected. This even makes sense on DCE-8+, which could do up to 16 bpc, as driving with more than 12 bpc would only waste video bandwidth as long as we don't support framebuffers with more than 12 bpc depth. On pre-DCE4 we clamp hdmi bit depth to 8 bpc, as those asics don't support hdmi deep color. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: Setup HDMI_CONTROL for hdmi deep color gcp's (v2)Alex Deucher2-1/+32
Program HDMI_CONTROL to send general control packets for hdmi deep color mode signalling at every video frame if bpc > 8. This is only supported on evergreen / DCE-4 and later. v2: rebase Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: fix pll setup for hdmi deep color (v7)Alex Deucher1-9/+36
Need to adjust the pll up for deep color modes. Additionally, the atom bpc defines were wrong in certain cases. v2: set the adjusted clock to the pll clock for hdmi deep color. This fixes display and audio issues with deep color as reported by Andy Furniss <adf.lists@gmail.com> v3: set crtc_clock as well v4: setcrtcinfo on the adjusted mode v5: just use the adjusted clock for setting the pll v6: only use the adjusted clock for hdmi v7: only DCE5 and DCE6 and bpc > 8 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: use hw cts/n values for deep colorAlex Deucher1-3/+15
I'm not really sure how these should be calculated for deep color. The hw generated values seem to work. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: only apply hdmi bpc pll flags when encoder mode is hdmiAlex Deucher1-22/+26
May fix display issues with non-HDMI displays. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-06-02drm/radeon/atom: fix dithering on certain panelsAlex Deucher1-1/+4
We need to specify the encoder mode as LVDS for eDP when using the Crtc_Source atom table in order to properly set up the FMT hardware. bug: https://bugs.freedesktop.org/show_bug.cgi?id=73911 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-06-02drm/radeon: optimize CIK VM handling v2Christian König1-1/+20
Fill VM page tables from the GART page table if applicable. v2: fix copy&paste error Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: optimize SI VM handlingChristian König1-1/+19
Fill VM page tables from the GART page table if applicable. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: add define for flags used in R600+ GTTChristian König2-8/+5
Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: rework page flip handling v3Christian König3-115/+150
Instead of trying to flip inside the vblank period when the buffer is idle, offload blocking for idle to a kernel thread and program the flip directly into the hardware. v2: add error handling, fix EBUSY handling v3: add proper exclusive_lock handling Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: separate vblank and pflip crtc handlingChristian König8-26/+56
Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: split page flip and pending callbackChristian König8-15/+88
Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: remove drm_vblank_get|put from pflip handlingChristian König1-17/+0
We activate the VBLANK irq manually anyway, so this is unnecessary. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: remove (pre|post)_page_flip callbacksChristian König7-128/+2
They are doing the same on all generations anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon/dp: fix lane/clock setup for dp 1.2 capable devicesAlex Deucher1-2/+15
Only DCE5+ asics support DP 1.2. Noticed by ArtForz on IRC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-06-02drm/radeon: fix typo in radeon_connector_is_dp12_capable()Alex Deucher1-1/+1
We were checking the ext clock rather than the display clock. Noticed by ArtForz on IRC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-06-02radeon: Remove useless quirk for zx1/FireGL X1 combo introduced with fdo #7770Émeric MASCHINO1-3/+0
Removes useless quirk a7f465f73363fce409870f62173d518b1bc02ae6 introduced with fdo #7770 as a failed attempt to minimize stability issues with hp zx1 chipset/ ATI FireGL X1 graphics adapter configuration (see http://marc.info/?l=linux-ia64&m=140077543819871&w=2 for details/reason) Signed-off-by: Émeric MASCHINO <emeric.maschino@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: use NULL instead of zero in clearstate headersMichele CURTI3-8/+8
Signed-off-by: Michele Curti <michele.curti@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: use NULL instead of zero in object functionsMichele CURTI2-2/+2
Signed-off-by: Michele Curti <michele.curti@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon/hdmi: DCE2: simplify audio workaroundRafał Miłecki1-60/+22
Thanks to advanced RE of fglrx we finally know what exactly needs to be handled of AFMT change. This has been tested for possible regressions on: 1) DCE2 HD2400 (RV610) 2) DCE3 HD3470 (RV620) For a reference and details see: https://bugzilla.kernel.org/show_bug.cgi?id=76231 Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon/hdmi: DCE2: update setmodeRafał Miłecki2-37/+90
Recent RE efforts revealed ops performed by fglrx during HDMI setup. This mostly adds masks to r/w ops plus few single missing bits. This has been tested for possible regressions on: 1) DCE2 HD2400 (RV610) 2) DCE3 HD3470 (RV620) For a reference and details see: https://bugzilla.kernel.org/show_bug.cgi?id=76231 Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon/hdmi: DCE3: clean ACR controlRafał Miłecki2-3/+7
What initially seemed to be a typo in fglrx (using register 0x740c instead of 0x74dc) appeared to be a correct behavior. DCE3 has ACR and CRC registers swapped which explains why we needed WREG32(HDMI0_AUDIO_CRC_CONTROL + offset, 0x1000); This has been tested for possible regressions on DCE3 HD3470 (RV620). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon/hdmi: use separated file for DCE 3.1/3.2 codeRafał Miłecki5-141/+263
DCE 3.1 and 3.2 should be programmed in a different way than DCE 2 and DCE 3. The order of setting registers and sets of registers are different. It's still unsure how we will handle DCE 3.1 vs. DCE 3.2, since they have few differences as well. For now separate DCE 2 and DCE 3 path, so we can work on it without a risk of breaking DCE 3.1+. This has been tested for possible regressions on DCE32 HD4550 (RV710). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: add proper support for RADEON_VM_BLOCK_SIZE v2Christian König7-1/+9
This patch makes it possible to decide how many address bits are spend on the page directory vs the page tables. v2: remove unintended change Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: add large PTE support for NI, SI and CIK v5Christian König5-9/+98
This patch implements support for VRAM page table entry compression. PTE construction is enhanced to identify physically contiguous page ranges and mark them in the PTE fragment field. L1/L2 TLB support is enabled for 64KB (SI/CIK) and 256KB (NI) PTE fragments, significantly improving TLB utilization for VRAM allocations. Linear store bandwidth is improved from 60GB/s to 125GB/s on Pitcairn. Unigine Heaven 3.0 sees an average improvement from 24.7 to 27.7 FPS on default settings at 1920x1200 resolution with vsync disabled. See main comment in radeon_vm.c for a technical description. v2 (chk): rebased and simplified. v3 (chk): add missing hw setup v4 (chk): rebased on current drm-fixes-3.15 v5 (chk): fix comments and commit text Signed-off-by: Jay Cornwall <jay@jcornwall.me> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02drm/radeon: add a i2c bus mutexAlex Deucher4-8/+37
The i2c and aux buses use the same pads so add a mutex to protect access to the pads. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-01Merge branch 'drm-init-cleanup' of git://people.freedesktop.org/~danvet/drm ↵Dave Airlie4-8/+8
into drm-next Next pull request, this time more of the drm de-midlayering work. The big thing is that his patch series here removes everything from drm_bus except the set_busid callback. Thierry has a few more patches on top of this to make that one optional to. With that we can ditch all the non-pci drm_bus implementations, which Thierry has already done for the fake tegra host1x drm_bus. Reviewed by Thierry, Laurent and David and now also survived some testing on my intel boxes to make sure the irq fumble is fixed correctly ;-) The last minute rebase was just to add the r-b tags from Thierry for the 2 patches I've redone. * 'drm-init-cleanup' of git://people.freedesktop.org/~danvet/drm: drm/<drivers>: don't set driver->dev_priv_size to 0 drm: Remove dev->kdriver drm: remove drm_bus->get_name drm: rip out dev->devname drm: inline drm_pci_set_unique drm: remove bus->get_irq implementations drm: pass the irq explicitly to drm_irq_install drm/irq: Look up the pci irq directly in the drm_control ioctl drm/irq: track the irq installed in drm_irq_install in dev->irq drm: rename dev->count_lock to dev->buf_lock drm: Rip out totally bogus vga_switcheroo->can_switch locking drm: kill drm_bus->bus_type drm: remove drm_dev_to_irq from drivers drm/irq: remove cargo-culted locking from irq_install/uninstall drm/irq: drm_control is a legacy ioctl, so pci devices only drm/pci: fold in irq_by_busid support drm/irq: simplify irq checks in drm_wait_vblank
2014-04-23drm/<drivers>: don't set driver->dev_priv_size to 0Daniel Vetter1-1/+0
Especially not on modesetting drivers - this is used to size the driver private structure for legacy drm buffers. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-23drm: pass the irq explicitly to drm_irq_installDaniel Vetter1-1/+1
Unfortunately this requires a drm-wide change, and I didn't see a sane way around that. Luckily it's fairly simple, we just need to inline the respective get_irq implementation from either drm_pci.c or drm_platform.c. With that we can now also remove drm_dev_to_irq from drm_irq.c. Reviewed-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-23drm: Rip out totally bogus vga_switcheroo->can_switch lockingDaniel Vetter1-5/+6
So I just wanted to add a new field to struct drm_device and accidentally stumbled over something. According to comments dev->open_count is protected by dev->count_lock, but that's totally not the case. It's protected by drm_global_mutex. Unfortunately the vga switcheroo callbacks took this comment at face value. The problem is that we can't just take the drm_global_mutex because: - It would lead to a locking inversion with the driver load/unload paths. - It wouldn't actually protect anything, for that we'd need to wrap the entire vga switcheroo code in the drm_global_mutex. And I'm not sure whether that would actually solve anything. What we probably want is a try_to_grab_switcheroo reference kind of thing which is used in the driver's ->open callback. Then we could move all that ->can_switch madness into the vga switcheroo core where it really belongs. But since that would amount to real work take the easy way out and just add a comment. It's definitely not going to make anything worse since doing switcheroo state changes while restarting X just isn't recommended. Even though the delayed switching code does exactly that. v2: - Simplify the ->can_switch implementations more (Thierry) - Fix comment about the dev->open_count locking (Thierry) Cc: Thierry Reding <treding@nvidia.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> (v1) Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-22drm/radeon: don't allow runpm=1 on systems with out ATPXAlex Deucher1-5/+3
vgaswitcheroo and the ATPX ACPI methods are required to power down the dGPU. bug: https://bugzilla.kernel.org/show_bug.cgi?id=73901 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-04-22drm/radeon: fix ATPX detection on non-VGA GPUsAlex Deucher1-0/+7
Some newer PX laptops have the pci device class set to DISPLAY_OTHER rather than DISPLAY_VGA. This properly detects ATPX on those laptops. Based on a patch from: Pali Rohár <pali.rohar@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Cc: airlied@gmail.com
2014-04-22drm/radeon/pm: don't walk the crtc list before it has been initialized (v2)Alex Deucher2-28/+35
Avoids a crash in certain cases when thermal irqs are generated before the display structures have been initialized. v2: fix the vblank and vrefresh helpers as well bug: https://bugzilla.kernel.org/show_bug.cgi?id=73931 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-04-22drm/radeon: properly unregister hwmon interface (v2)Alex Deucher1-6/+15
Need to properly unregister the hwmon device on driver unload. v2: minor clean up bug: https://bugzilla.kernel.org/show_bug.cgi?id=73931 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-04-22drm/radeon: fix count in cik_sdma_ring_test()Alex Deucher1-1/+1
Should be 5 rather than 4. Noticed-by: Mathias Fröhlich <Mathias.Froehlich@gmx.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Christian König <christian.koenig@amd.com>
2014-04-22drm: remove drm_dev_to_irq from driversDaniel Vetter1-1/+1
Only used in some legacy pci drivers, and dereferencing the PCI irq is actually shorter ... Since this removes all users for drm_dev_to_irq from the tree except in drm_irq.c, move the inline helper in there. It'll disappear soon, too. v2: Polish commit message (Thierry) Reviewed-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-22drm/radeon/aux: fix hpd assignment for aux busAlex Deucher1-0/+1
The hpd (hot plug detect) pin assignment got lost in the conversion to to the common i2c over aux code. Without this information, aux transactions do not work properly. Fixes DP failures. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
2014-04-20drm/radeon: improve PLL limit handling in post div calculationChristian König1-26/+51
This improves the PLL parameters when we work at the limits of the allowed ranges. Signed-off-by: Christian König <christian.koenig@amd.com>
2014-04-19drm/radeon: use fixed PPL ref divider if neededChristian König1-1/+6
Signed-off-by: Christian König <christian.koenig@amd.com>
2014-04-19drm/radeon: disable dpm on rv770 by defaultAlex Deucher1-1/+1
There seem to be stability issues on a number of cards. bugs: https://bugs.freedesktop.org/show_bug.cgi?id=76286 https://bugzilla.redhat.com/show_bug.cgi?id=1085785 https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=741619 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: matthias.graf@st.ovqu.de Cc: bp@alien8.de Cc: stable@vger.kernel.org
2014-04-19Merge branch 'drm-next-3.15-wip' of ↵Dave Airlie8-211/+77
git://people.freedesktop.org/~deathsimple/linux into drm-next Some i2c fixes over DisplayPort. * 'drm-next-3.15-wip' of git://people.freedesktop.org/~deathsimple/linux: drm/radeon: Improve vramlimit module param documentation drm/radeon: fix audio pin counts for DCE6+ (v2) drm/radeon/dp: switch to the common i2c over aux code drm/dp/i2c: Update comments about common i2c over dp assumptions (v3) drm/dp/i2c: send bare addresses to properly reset i2c connections (v4) drm/radeon/dp: handle zero sized i2c over aux transactions (v2) drm/i915: support address only i2c-over-aux transactions drm/tegra: dp: Support address-only I2C-over-AUX transactions
2014-04-17drm/radeon/ci: make sure mc ucode is loaded before checking the sizeAlex Deucher1-1/+3
Avoid a possible segfault. Noticed-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-04-17drm/radeon/si: make sure mc ucode is loaded before checking the sizeAlex Deucher1-1/+3
Avoid a possible segfault. Noticed-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-04-17drm/radeon: improve PLL params if we don't match exactly v2Christian König1-6/+7
Otherwise we might be quite off on older chipsets. v2: keep ref_div minimum Signed-off-by: Christian König <christian.koenig@amd.com>
2014-04-17drm/radeon: memory leak on bo reservation failure. v2Quentin Casasnovas1-2/+7
On bo reservation failure, we end up leaking fpriv. v2 (chk): rebased and added missing free on vm failure as well Fixes: 5e386b574cf7e1 ("drm/radeon: fix missing bo reservation") Cc: stable@vger.kernel.org Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Quentin Casasnovas <quentin.casasnovas@oracle.com> Signed-off-by: Christian König <christian.koenig@amd.com>
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