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path: root/drivers/gpu/drm/nouveau/nvc0_graph.c
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2012-05-24drm/nouveau/fifo: turn all fifo modules into engine modulesBen Skeggs1-1/+3
Been tested on each major revision that's relevant here, but I'm sure there are still bugs waiting to be ironed out. This is a *very* invasive change. There's a couple of pieces left that I don't like much (eg. other engines using fifo_priv for the channel count), but that's an artefact of there being a master channel list still. This is changing, slowly. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-22drm/nvc0-/disp: reimplement flip completion method as fifo methodBen Skeggs1-9/+0
Removes need for M2MF subchannel usage on NVC0+. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21drm/nvc0/gr: add initial support for nvd9, not quite there yet..Ben Skeggs1-2/+4
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-11-30drm/nvc0/gr: fix TP init for transform feedback offset queriesChristoph Bumiller1-0/+2
Without this, they return bytes written since the last update of the offset, but we want the full offset. Trace shows setting this on GPC[0]/TP[0] is enough. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-11-10drm/nvc0/gr: fixup the mmio list register writes for 0xc1Ben Skeggs1-9/+32
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-10-31gpu: add module.h to drivers/gpu files as required.Paul Gortmaker1-0/+1
So that we don't get build failures once the implicit module.h presence is removed. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2011-09-20drm/nvc0/fb: slightly improve PMFB intr handling, move out of nvc0_graph.cBen Skeggs1-18/+0
I'm still not certain how to determine the number of SUBPs are present on a given board. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nvc0/gr: remove MODULE_FIRMWARE() linesBen Skeggs1-17/+0
We don't use these by default anymore, and there's been complaints from a number of places thinking that the firmware blobs are required still. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nvc0/gr: copy GPC mpart config from PFFBBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nvc0/gr: add support for nvcf chipsetBen Skeggs1-0/+3
untested, written from a trace, accel disabled by default until it is Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-07-25drm/nouveau: pass flag to engine fini() method on suspendBen Skeggs1-1/+1
It may not be necessary to fail in certain cases (such as failing to idle) on module unload, whereas on suspend it's important to ensure a consistent state can be restored on resume. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-27drm/nouveau: error paths leak in nvc0_graph_construct_context()Dan Carpenter1-10/+12
Two of these error paths returned without freeing "ctx". Signed-off-by: Dan Carpenter <error27@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0: push prunk140 irq messages to debug loglevelBen Skeggs1-1/+1
We know they happen, we don't know why. They're annoying, so hide them from users for the moment. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: will need to specify channel for vm-ful gpuobj allocationsBen Skeggs1-5/+5
Abuses existing gpuobj_new() chan argument for this, which in turn forces all NVOBJ_FLAG_VM allocations to be done from the global heap, not suballocated from the channel's private heap. Not a problem though in practise. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/gr: calculate magicgpc918 ourselvesBen Skeggs1-19/+3
Not a clue what it is yet, but we get the same numbers as NVIDIA now. My 465 didn't seem to care to greatly *what* I bashed into these registers.. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/gr: add some missing magics for 0xc1/0xc8/0xceBen Skeggs1-0/+12
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/gr: import and use our own fuc by defaultBen Skeggs1-36/+149
The ability to use NVIDIA's fuc has been retained *temporarily* in order to better debug any issues that may be lingering in our initial attempt at writing this ucode. Once I'm fairly confident we're okay, it'll be removed. There's a number of things not implemented by this fuc currently, but most of it is sets of state that our context setup would not have used anyway. No doubt we'll find out what they're for at some point, and implement it if required. This has been tested on 0xc0/0xc4 thus far, and from what I could tell it worked as well as NVIDIA's. It's also been tested on 0xc1, but even with NVIDIA's fuc that chipset doesn't work correctly with nouveau yet. 0xc3/0xc8/0xce should in theory be supported too, but I don't have the hardware to check that. There's no doubt numerous bugs to squash yet, please report any! Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0: fix suspend/resume of PGRAPH/PCOPYnBen Skeggs1-10/+10
We need the physical VRAM address in vinst, even for objects mapped into a vm, as the gpuobj suspend/resume code uses PMEM to access the object. Previously, vinst was overloaded to mean "VRAM address" for !VM objects, and "VM address" for VM objects, causing the wrong data to be accessed during suspend/resume. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/gr: some initial state modificationsBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/gr: macro to determine fermi class, will use it in a few placesBen Skeggs1-6/+7
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nvc0/gr: calculate some more of our magic numbersBen Skeggs1-37/+19
Again, doesn't quite match NVIDIA's, but not sure it really matters. This will however, match the same rules we use to calculate the other related grctx magics. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nvc0/gr: no need to store context in graph_fini()Ben Skeggs1-6/+0
PFIFO kickoff should have handled this for us. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nvc0/gr: better handling of fuc firmwareBen Skeggs1-35/+76
Allows per-chipset firmware to be installed, and keeps a copy in memory for suspend/resume purposes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nvc0: implement support for copy enginesBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau: remove remnants of nouveau_pgraph_engineBen Skeggs1-28/+13
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nvc0/gr: move to exec engine interfacesBen Skeggs1-214/+192
Much nicer to do that nv50, the code was pretty much written to expect such a change in the future. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau: move engine object creation into per-engine hooksBen Skeggs1-0/+6
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau: Clean up trailing whitespace and C99-style comments.Emil Velikov1-24/+26
Fix 'ERROR: trailing whitespace', Fix 'ERROR: do not use C99 // comments' Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2011-05-16drm/nouveau: Fix indentation-related checkpatch.pl error messages.Emil Velikov1-9/+9
Fix 'ERROR: code indent should use tabs where possible' Fix 'ERROR: space required before the open parenthesis (' Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2011-02-25drm/nvc0: support for sw methods + enable page flippingBen Skeggs1-3/+15
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25drm/nouveau: silence some compiler warningsBen Skeggs1-2/+0
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-01-25drm/nvc0: implement irq handler for whatever's at 0x14xxxxBen Skeggs1-0/+19
This is just barely enough to stop a never-ending IRQ storm that can be triggered by our 3D driver. We have no idea what this engine is.. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-01-25drm/nvc0: fix incorrect TPC register setupBen Skeggs1-2/+2
Was hitting TPC+1's regs by accident, oops. Reported-by: Christoph Bumiller <e0425955@student.tuwien.ac.at> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-01-17drm/nvc0: enable protection of system-use-only structures in vmBen Skeggs1-1/+2
Somehow missed this in the original merge of the nvc0 code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-01-06drm/nvc0: fix init without firmware presentBen Skeggs1-5/+3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-30drm/nv50: sync up gr data error names with rnn, use for nvc0 alsoBen Skeggs1-6/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-30drm/nvc0: parse a couple more PGRAPH_INTRBen Skeggs1-0/+16
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-29drm/nvc0: nuke left-over debug messagesBen Skeggs1-1/+0
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-29drm/nvc0: kill off a couple more magicsBen Skeggs1-13/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-21drm/nvc0: implement pgraph engine hooksBen Skeggs1-1/+708
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-08-06drm/nvc0: starting point for GF100 support, everything stubbedBen Skeggs1-0/+75
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>