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path: root/drivers/gpu/drm/i915/intel_pm.c
AgeCommit message (Expand)AuthorFilesLines
2014-03-03drm/i915: vlv: reserve GT power context earlyImre Deak1-2/+4
2014-01-16Merge commit origin/master into drm-intel-nextDaniel Vetter1-7/+17
2014-01-10drm/i915: Fix 915GM self-refresh enable/disableVille Syrjälä1-2/+2
2014-01-10drm/i915: i830M has watermarks like i855Daniel Vetter1-34/+19
2014-01-10drm/i915: Drop I915_ prefix from HAS_FBCDaniel Vetter1-2/+2
2014-01-08drm/i915: use crtc_htotal when calculating ilk watermarksJesse Barnes1-1/+1
2014-01-07drm/i915: Simplify watermark/init_clock_gating setupVille Syrjälä1-62/+16
2014-01-07drm/i915: Enable watermarks for BDWVille Syrjälä1-0/+11
2014-01-07drm/i915: Fix watermark code for BDWVille Syrjälä1-7/+7
2013-12-17drm/i915: s/haswell_update_wm/ilk_update_wm/Imre Deak1-43/+43
2013-12-17drm/i915: simplify platform specific code in hsw_write_wm_valuesImre Deak1-6/+5
2013-12-17drm/i915: Try to fix the messy IVB sprite scaling workaroundVille Syrjälä1-13/+45
2013-12-17drm/i915: Move ILK/SNB/IVB over to the HSW WM codeVille Syrjälä1-645/+11
2013-12-17drm/i915: Disable LP1+ watermarks safely in initVille Syrjälä1-12/+19
2013-12-17drm/i915: Linetime watermarks are a HSW featureVille Syrjälä1-2/+4
2013-12-17drm/i915: Disable FBC WM on ILK, and disable LP2+ when FBC is enabledVille Syrjälä1-1/+16
2013-12-17drm/i915: Don't merge LP1+ watermarks on ILK/SNB/IVB when multiple pipes are ...Ville Syrjälä1-2/+8
2013-12-17drm/i915: Fix LP1+ watermark disabling ILKVille Syrjälä1-13/+20
2013-12-17drm/i915: Fix LP1 sprite watermarks for ILK/SNBVille Syrjälä1-7/+20
2013-12-17drm/i915: Avoid computing invalid WM levels when sprites/scaling is enabledVille Syrjälä1-0/+8
2013-12-17drm/i915: Add ILK/SNB/IVB WM latency field supportVille Syrjälä1-1/+12
2013-12-17drm/i915: Add IVB DDB partitioning controlVille Syrjälä1-8/+22
2013-12-17drm/i915: Use IS_VALLEYVIEW() to test the is_valleyview flagDamien Lespiau1-2/+6
2013-12-13drm/i915: get a PC8 reference when enabling the power wellPaulo Zanoni1-2/+12
2013-12-13drm/i915/bdw: Implement ff workaroundsBen Widawsky1-3/+9
2013-12-13drm/i915/bdw: Force all Data Cache Data Port access to be Non-CoherentBen Widawsky1-0/+8
2013-12-12drm/i915: Rework the FBC interval/stall stuff a bitVille Syrjälä1-20/+14
2013-12-12drm/i915: FBC_CONTROL2 is gen4 onlyVille Syrjälä1-6/+10
2013-12-12drm/i915: Gen2 FBC1 CFB pitch wants 32B unitsVille Syrjälä1-2/+5
2013-12-12drm/i915: touch VGA MSR after we enable the power wellPaulo Zanoni1-0/+15
2013-12-12drm/i915: extract hsw_power_well_post_{enable, disable}Paulo Zanoni1-31/+44
2013-12-12Merge tag 'drm-intel-fixes-2013-12-11' of git://people.freedesktop.org/~danve...Dave Airlie1-1/+10
2013-12-12Merge branch 'bdw-fixes' of git://people.freedesktop.org/~danvet/drm-intel in...Dave Airlie1-1/+17
2013-12-10drm/i915: add initial Runtime PM functionsPaulo Zanoni1-0/+55
2013-12-10drm/i915: get a PC8 reference when enabling the power wellPaulo Zanoni1-2/+13
2013-12-09Merge tag 'v3.13-rc3' into drm-intel-next-queuedDaniel Vetter1-2/+2
2013-12-06drm/i915: fix pm init orderingDaniel Vetter1-1/+10
2013-12-04drm/i915: Reorganize FBC function pointer initializaitionVille Syrjälä1-9/+7
2013-12-04drm/i915: Fix FBC1 plane checks for gen2Ville Syrjälä1-3/+3
2013-11-28drm/i915: add intel_display_power_enabled_sw() for use in atomic ctxImre Deak1-8/+16
2013-11-28drm/i915/vlv: use parallel context restore when coming out of RC6Jesse Barnes1-1/+1
2013-11-28drm/i915/vlv: use a lower RC6 timeout on VLVJesse Barnes1-1/+1
2013-11-28drm/i915/vlv: Valleyview support for forcewake Individual power wells.Deepak S1-2/+5
2013-11-28drm/i915: Add power well arguments to force wake routines.Deepak S1-8/+11
2013-11-27drm/i915: use crtc_htotal in watermark calculations to match fastboot v2Jesse Barnes1-7/+8
2013-11-26drm/i915: add a debugfs entry for power domain infoImre Deak1-0/+12
2013-11-26drm/i915: add a default always-on power wellImre Deak1-19/+9
2013-11-26drm/i915: don't do BDW/HSW specific powerdomains init on other platformsImre Deak1-0/+3
2013-11-26drm/i915: add always-on power wells instead of special casing themImre Deak1-28/+13
2013-11-26drm/i915: support for multiple power wellsImre Deak1-17/+99
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