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path: root/drivers/gpu/drm/i915/intel_engine_cs.c
AgeCommit message (Expand)AuthorFilesLines
2018-07-13drm/i915: Do not short-circuit tasklets during resetChris Wilson1-5/+7
2018-07-11drm/i915/execlists: Switch to rb_root_cachedChris Wilson1-4/+3
2018-07-07drm/i915: Replace nested subclassing with explicit subclassesChris Wilson1-0/+1
2018-07-06drm/i915: Record logical context support in driver capsChris Wilson1-0/+2
2018-07-05drm/i915: Mark expected switch fall-throughsGustavo A. R. Silva1-0/+1
2018-06-28drm/i915/execlists: Direct submission of new requests (avoid tasklet/ksoftirqd)Chris Wilson1-4/+4
2018-06-28drm/i915/execlists: Trust the CSBChris Wilson1-6/+2
2018-06-28drm/i915/execlists: Unify CSB access pointersChris Wilson1-12/+0
2018-06-20drm/i915: Disable bh around call to taskletChris Wilson1-0/+2
2018-06-18drm/i915: Fix fallout of fake reset along resumeChris Wilson1-0/+22
2018-06-14drm/i915: Show CCID in engine dumpsChris Wilson1-0/+2
2018-06-14drm/i915: Make the hexdump row offset visually distinctChris Wilson1-1/+1
2018-06-14drm/i915: Dump the ringbuffer of the active request for debuggingChris Wilson1-5/+36
2018-06-12drm/i915/ringbuffer: Serialize load of PD_DIRChris Wilson1-2/+3
2018-06-11drm/i915/ringbuffer: Fix context restore upon resetChris Wilson1-3/+0
2018-06-05drm/i915/gtt: Rename i915_hw_ppgtt base memberChris Wilson1-2/+2
2018-05-24drm/i915/icl: Enable WaProgramMgsrForCorrectSliceSpecificMmioReadsYunwei Zhang1-0/+3
2018-05-24drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReadsYunwei Zhang1-5/+25
2018-05-19drm/i915/execlists: Handle copying default context state for atomic resetChris Wilson1-0/+15
2018-05-19drm/i915: Make intel_engine_dump irqsafeChris Wilson1-4/+7
2018-05-19drm/i915: Speed up idle detection by kicking the taskletsChris Wilson1-3/+12
2018-05-18drm/i915: Store a pointer to intel_context in i915_requestChris Wilson1-22/+32
2018-05-18drm/i915: Move fiddling with engine->last_retired_contextChris Wilson1-0/+23
2018-05-18drm/i915: Move request->ctx asideChris Wilson1-1/+1
2018-05-17drm/i915: Nul-terminate legacy debug stringChris Wilson1-1/+1
2018-05-16drm/i915: Stop parking the signaler around resetChris Wilson1-0/+29
2018-05-14drm/i915/execlists: Relax CSB force-mmio for VT-dChris Wilson1-8/+0
2018-05-11Revert "drm/i915/cnl: Use mmio access to context status buffer"Chris Wilson1-3/+0
2018-05-03drm/i915: Mark the hangcheck as idle when unparking the enginesChris Wilson1-0/+2
2018-05-02drm/i915: Split i915_gem_timeline into individual timelinesChris Wilson1-15/+12
2018-05-02drm/i915: Move timeline from GTT to ringChris Wilson1-1/+2
2018-05-02drm/i915: Show ring->start for the ELSP context/request queueChris Wilson1-2/+3
2018-04-30drm/i915: Wrap engine->context_pin() and engine->context_unpin()Chris Wilson1-7/+6
2018-04-30drm/i915: Stop tracking timeline->inflight_seqnosChris Wilson1-3/+2
2018-04-26drm/i915: Use seqlock in engine statsTvrtko Ursulin1-9/+10
2018-04-24drm/i915: Skip printing global offsets for per-engine scratch pagesChris Wilson1-5/+0
2018-04-24drm/i915: Don't dump umpteen thousand requestsChris Wilson1-5/+38
2018-04-24drm/i915: Build request info on stack before printkChris Wilson1-9/+15
2018-04-18drm/i915: Pack params to engine->schedule() into a structChris Wilson1-3/+15
2018-04-18drm/i915: Rename priotree to schedChris Wilson1-2/+2
2018-04-13drm/i915/cnl: Use mmio access to context status bufferMika Kuoppala1-0/+3
2018-04-11drm/i915: Move a bunch of workaround-related code to its own fileOscar Mateo1-634/+0
2018-04-11drm/i915/execlists: Set queue priority from secondary portChris Wilson1-0/+3
2018-03-27drm/i915: Include submission tasklet state in engine dumpChris Wilson1-2/+5
2018-03-20drm/i915/icl: Update subslice define for ICL 11Kelvin Gardiner1-4/+18
2018-03-15drm/i915: move gen8 irq shifts to intel_lrc.cDaniele Ceraolo Spurio1-10/+0
2018-03-15drm/i915: add a selftest for the mmio_bases tableDaniele Ceraolo Spurio1-6/+10
2018-03-15drm/i915: store all mmio bases in intel_enginesDaniele Ceraolo Spurio1-28/+50
2018-03-14drm/i915: Check rq->timeline before deferenceChris Wilson1-1/+3
2018-03-09drm/i915: Change parameters order in i915_gem_batch_pool_initMichal Wajdeczko1-3/+6
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