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path: root/drivers/gpu/drm/i915/intel_display.c
AgeCommit message (Expand)AuthorFilesLines
2014-06-05drm: convert crtc and connection_mutex to ww_mutex (v5)Rob Clark1-19/+37
2014-06-04drm: Split connection_mutex out of mode_config.mutex (v3)Daniel Vetter1-4/+12
2014-06-04drm/i915: replace drm_get_encoder_name() with direct name field useJani Nikula1-7/+7
2014-06-04drm/i915: replace drm_get_connector_name() with direct name field useJani Nikula1-8/+8
2014-05-22drm/i915: s/intel_ring_buffer/intel_engine_csOscar Mateo1-9/+9
2014-05-22drm/i915: Fix gen2 and hsw+ scanline counterVille Syrjälä1-1/+44
2014-05-22drm/i915: Wait for pending page flips before enabling/disabling the primary p...Ville Syrjälä1-1/+1
2014-05-22drm/i915: Shuffle fifo underrun disable/enable points for gmch platformsVille Syrjälä1-3/+27
2014-05-22drm/i915: Check for FIFO underruns at the end of modeset on gmchVille Syrjälä1-0/+6
2014-05-21drm/i915: Re-enable vblank irqs for already active pipesVille Syrjälä1-0/+6
2014-05-21Merge branch 'topic/drm-vblank-rework' into drm-intel-next-queuedDaniel Vetter1-6/+22
2014-05-21drm/i915: Accurately initialize fifo underrun state on gmch platformsDaniel Vetter1-1/+8
2014-05-21drm/i915: Use new kms-native vblank functionsDaniel Vetter1-10/+12
2014-05-21drm/i915: Remove drm_vblank_pre/post_modeset callsDaniel Vetter1-5/+0
2014-05-21drm/i915: Move buffer pinning and ring selection to intel_crtc_page_flip()Ville Syrjälä1-81/+34
2014-05-21drm/i915: Drop the excessive vblank waits from modeset codepathsVille Syrjälä1-11/+7
2014-05-21drm/i915: Wait for vblank in hsw_enable_ips()Ville Syrjälä1-6/+6
2014-05-21drm/i915: Fix mmio vs. CS flip race on ILK+Ville Syrjälä1-7/+66
2014-05-20drm: Add drm_vblank_on()Ville Syrjälä1-0/+8
2014-05-20drm/i915/chv: Reset data lanes in encoder .post_disable() hookVille Syrjälä1-6/+1
2014-05-20drm/i915/chv: Turn off dclkp after the PLL has been disabledVille Syrjälä1-5/+10
2014-05-20drm/i915/chv: Move data lane deassert to encoder pre_enableVille Syrjälä1-5/+0
2014-05-20drm/i915/chv: Fix CHV PLL state trackingVille Syrjälä1-15/+26
2014-05-20drm/i915/chv: Register port D encoders and connectorsVille Syrjälä1-0/+9
2014-05-20drm/i915/chv: Add cursor pipe offsetsVille Syrjälä1-26/+16
2014-05-20drm/i915: s/ironlake_/intel_ for the enable_share_dpll functionDaniel Vetter1-5/+3
2014-05-20drm/i915: Extract intel_prepare_shared_dpllDaniel Vetter1-7/+19
2014-05-20drm/i915: Only update shared dpll state when neededDaniel Vetter1-3/+5
2014-05-20drm/i915: Extract vlv_prepare_pllDaniel Vetter1-23/+30
2014-05-20drm/i915: Extract i9xx_set_pll_dividersDaniel Vetter1-5/+11
2014-05-20drm/i915: Shovel hw setup code out of hsw_crtc_mode_setDaniel Vetter1-23/+24
2014-05-20drm/i915: Shovel hw setup code out of ilk_crtc_mode_setDaniel Vetter1-22/+24
2014-05-20drm/i915: Move lowfreq_avail around a bit in ilk/hsw_crtc_mode_setDaniel Vetter1-5/+5
2014-05-20drm/i915: Shovel hw setup code out of i9xx_crtc_mode_setDaniel Vetter1-35/+63
2014-05-19drm/i915: Don't die in wait_for_pending_flipsDaniel Vetter1-2/+3
2014-05-19drivers/gpu/drm/i915/intel_display: coding style fixesRobin Schroer1-10/+8
2014-05-19drm/i915: Move fb pinning into __intel_set_modeDaniel Vetter1-60/+20
2014-05-19drm/i915: Inline set_base into crtc_mode_setDaniel Vetter1-6/+63
2014-05-19drm/i915: Sprinkle intel_edp_psr_update over crtc_enable/disableDaniel Vetter1-0/+4
2014-05-19drm/i915: More cargo-culted locking for intel_update_fbcDaniel Vetter1-0/+2
2014-05-19drm/i915: Make ->update_primary_plane infallibleDaniel Vetter1-19/+10
2014-05-16drm/i915: Stop calling encoder->mode_setDaniel Vetter1-36/+2
2014-05-16drm/i915: Track has_audio in the pipe configDaniel Vetter1-4/+2
2014-05-16drm/i915: state readout and cross checking for limited_color_rangeDaniel Vetter1-0/+9
2014-05-16drm/i915: Track hdmi mode in the pipe configDaniel Vetter1-0/+1
2014-05-14drm/i915: Use for_each_crtc() when iterating through the CRTCsDamien Lespiau1-9/+9
2014-05-14drm/i915: Use for_each_intel_crtc() when iterating through intel_crtcsDamien Lespiau1-33/+20
2014-05-13drm/i915: Kill vblank waits after pipe enable on gmch platformsVille Syrjälä1-4/+0
2014-05-13drm/i915: Disable/enable planes as the first/last thing during modeset on gmc...Ville Syrjälä1-6/+6
2014-05-13drm/i915/chv: CHV doesn't have CRT outputVille Syrjälä1-1/+1
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