summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_color.c
AgeCommit message (Expand)AuthorFilesLines
2019-02-13drm/i915/icl: Enable pipe output cscUma Shankar1-19/+58
2019-02-13drm/i915/icl: Enable ICL Pipe CSC blockUma Shankar1-1/+4
2019-02-13drm/i915/icl: Add icl pipe degamma and gamma supportUma Shankar1-2/+19
2019-02-13drm/i915/glk: Fix degamma lut programmingUma Shankar1-28/+34
2019-02-08drm/i915: Update DSPCNTR gamma/csc bits during crtc_enable()Ville Syrjälä1-0/+4
2019-02-08drm/i915: Disable pipe gamma when C8 pixel format is usedVille Syrjälä1-1/+7
2019-02-08drm/i915: Turn off pipe CSC when it's not neededVille Syrjälä1-2/+8
2019-02-08drm/i915: Turn off pipe gamma when it's not neededVille Syrjälä1-2/+53
2019-02-08drm/i915: Track pipe csc enable in crtc stateVille Syrjälä1-1/+6
2019-02-08drm/i915: Track pipe gamma enable/disable in crtc stateVille Syrjälä1-1/+27
2019-02-08drm/i915: Populate gamma_mode for all platformsVille Syrjälä1-15/+45
2019-02-07drm/i915: Move LUT programming to happen after vblank waitsVille Syrjälä1-24/+1
2019-02-07drm/i915: Split color mgmt based on single vs. double buffered registersVille Syrjälä1-26/+23
2019-02-07drm/i915: Pull GAMMA_MODE write out from haswell_load_luts()Ville Syrjälä1-16/+20
2019-02-07drm/i915: Constify the state arguments to the color management stuffVille Syrjälä1-64/+76
2019-02-07drm/i915: Precompute gamma_modeVille Syrjälä1-9/+12
2019-02-05drm/i915: Rename HAS_GMCHRodrigo Vivi1-3/+3
2019-01-30drm/i915: Apply LUT validation checks to platforms more accurately (v3)Matt Roper1-30/+30
2019-01-23drm/i915: Validate userspace-provided color management LUT's (v4)Matt Roper1-0/+16
2019-01-21drm/i915/color: switch to kernel typesJani Nikula1-20/+20
2018-12-13drm/i915: Fix Cherryview oops on bootChris Wilson1-3/+6
2018-12-10drm/i915: Use intel_ types more consistently for color management code (v2)Matt Roper1-114/+101
2018-10-15drm/i915: Add CRTC output format YCBCR 4:4:4Shashank Sharma1-1/+2
2018-10-15drm/i915: Add CRTC output format YCBCR 4:2:0Shashank Sharma1-1/+1
2018-03-21Merge airlied/drm-next into drm-misc-nextSean Paul1-45/+52
2018-03-16drm/i915: Use drm_color_lut_size()Ville Syrjälä1-8/+6
2018-03-16drm/i915: Remove the blob->data castsVille Syrjälä1-11/+7
2018-02-28drm/i915: Don't mangle the CTM on pre-HSWVille Syrjälä1-4/+12
2018-02-28drm/i915: Rename pipe CSC to use ilk_ prefixVille Syrjälä1-20/+19
2018-02-28drm/i915: Remove the pointless 1:1 matrix copyVille Syrjälä1-8/+9
2018-02-22drm/i915: Fix Limited Range Color HandlingJohnson Lin1-15/+14
2017-11-17drm/i915: Pass crtc_state to ips toggle functions, v2Maarten Lankhorst1-2/+2
2017-10-06drm/i915: Use crtc_state_is_legacy_gamma in intel_color_checkMaarten Lankhorst1-9/+7
2017-09-01drm/i915: Make i9xx_load_ycbcr_conversion_matrix() staticVille Syrjälä1-1/+1
2017-08-02drm/i915: Fix out-of-bounds array access in bdw_load_gamma_lutMaarten Lankhorst1-0/+1
2017-07-27drm/i915: prepare csc unit for YCBCR420 outputShashank Sharma1-1/+44
2017-07-06drm/i915/cnl: Cannonlake color init.Rodrigo Vivi1-1/+1
2017-03-14drm/i915/glk: Improve rounding caused by pre-CSC gamma tablesAnder Conselvan de Oliveira1-2/+2
2017-02-17drm/i915/glk: Load the degamma LUT even in legacy gamma modeAnder Conselvan de Oliveira1-1/+2
2017-01-30drm/i915/glk: Program pipe gamma and degamma tablesAnder Conselvan de Oliveira1-1/+57
2017-01-30drm/i915: Split broadwell_load_luts() into smaller functionsAnder Conselvan de Oliveira1-11/+32
2017-01-24drm/i915: Introduce IS_GEN9_BC for Skylake and Kabylake.Rodrigo Vivi1-2/+2
2016-11-17drm/i915: Assorted INTEL_INFO(dev) cleanupsTvrtko Ursulin1-3/+2
2016-11-11drm/i915: Pass dev_priv to INTEL_INFO everywhere apart from the gen useTvrtko Ursulin1-17/+14
2016-10-14drm/i915: Make IS_CHERRYVIEW only take dev_privTvrtko Ursulin1-1/+1
2016-10-14drm/i915: Make IS_HASWELL only take dev_privTvrtko Ursulin1-2/+2
2016-10-14drm/i915: Make IS_BROADWELL only take dev_privTvrtko Ursulin1-2/+2
2016-10-14drm/i915: Make HAS_GMCH_DISPLAY only take dev_privTvrtko Ursulin1-3/+3
2016-08-23drm/i915: Use more atomic state in intel_color.cMaarten Lankhorst1-10/+14
2016-07-07drm/i915: Kill has_dsi_encoderVille Syrjälä1-1/+1
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-25 07:59:28 +0000