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path: root/drivers/gpu/drm/i915/intel_bios.c
AgeCommit message (Expand)AuthorFilesLines
2010-03-17drivers/gpu/drm/i915/intel_bios.c: fix continuation line formatsJoe Perches1-2/+3
2010-02-26drm/i915: Add initial bits for VGA modesetting bringup on Sandybridge.Eric Anholt1-1/+2
2010-01-15drm/i915: parse eDP panel color depth from VBT blockZhenyu Wang1-0/+32
2010-01-15drm/i915: disable LVDS downclock by defaultJesse Barnes1-1/+2
2009-12-07drm/i915: Fix product names and #definesAdam Jackson1-1/+1
2009-11-30drm/i915: parse child device from VBTZhao Yakui1-0/+65
2009-11-30drm/i915: fix gpio register detection logic for BIOS without VBTShaohua Li1-4/+0
2009-11-25drm/i915: Check whether the LVDS downclock is found in VBTZhao Yakui1-0/+42
2009-11-05drm/i915: Replace DRM_DEBUG with DRM_DEBUG_KMSZhao Yakui1-12/+12
2009-10-13drm/i915: Fix render reclock availability detection.Andy Lutomirski1-8/+6
2009-09-17drm/i915: Fix SSC frequence for IGDNGZhenyu Wang1-0/+3
2009-09-04drm/i915: add dynamic clock frequency controlJesse Barnes1-1/+7
2009-08-29drm/i915: Improve CRTDDC mapping by using VBT infoDavid Müller (ELSOFT AG)1-3/+48
2009-07-29drm/i915: Add eDP support on IGDNG mobile chipZhenyu Wang1-0/+21
2009-07-29drm/I915: Fix offset to DVO timings in LVDS dataZhao Yakui1-9/+10
2009-07-10drm/i915: Fix for LVDS VBT change on IGDNGZhenyu Wang1-1/+9
2009-07-01drm/i915: Set SSC frequency for 8xx chips correctlyling.ma@intel.com1-4/+6
2009-06-22drm/i915: fix LFP data fetchJesse Barnes1-1/+11
2009-06-18drm: Remove memory debugging infrastructure.Eric Anholt1-4/+2
2009-06-05drm/i915: parse VBT general definition block to get the SDVO device infoyakui_zhao1-1/+85
2009-05-22drm/i915: Fetch SDVO LVDS mode lines from VBT, then reserve themMa Ling1-30/+72
2009-02-25drm/i915: handle bogus VBT panel timingJesse Barnes1-0/+6
2009-02-20drm: Use spread spectrum when the bios tells us it's ok.Kristian Høgsberg1-0/+8
2008-12-29DRM: i915: add mode setting supportJesse Barnes1-0/+193
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