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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)AuthorFilesLines
2016-05-20drm/i915/psr: Implement PSR2 w/a for gen9Daniel Vetter1-0/+1
2016-05-13drm/i915: Program BXT_CDCLK_CD2X_PIPEVille Syrjälä1-2/+3
2016-05-03drm/i915/chv: Tune L3 SQC credits based on actual latenciesImre Deak1-0/+6
2016-05-03drm/i915: Clean up L3 SQC register field definitionsImre Deak1-2/+2
2016-04-28drm/i915: Update CDCLK_FREQ register on BDW after changing cdclk frequencyVille Syrjälä1-0/+2
2016-04-27drm/i915: Update RAWCLK_FREQ register on VLV/CHVVille Syrjälä1-0/+2
2016-04-25drm/i915:bxt: implement WaProgramL3SqcReg1DefaultForPerfTim Gore1-0/+1
2016-04-24drm/i915: Macros to convert PM time interval values to microsecondsAkash Goel1-0/+9
2016-04-22drm/i915: Make RPS EI/thresholds multiple of 25 on SNB-BDWVille Syrjälä1-1/+8
2016-04-20drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupportTim Gore1-0/+1
2016-04-19drm/i915: Clean up PCI config register handlingJoonas Lahtinen1-10/+28
2016-04-15drm/i915/bxt: Fix GRC code register field definitionsImre Deak1-7/+3
2016-04-14drm/i915: Ignore GTFIFODBG FIFO free entry fields on CHVVille Syrjälä1-0/+2
2016-04-14drm/i915: Calculate edram sizeMika Kuoppala1-0/+3
2016-04-14drm/i915: Store and use edram capabilitiesMika Kuoppala1-1/+1
2016-04-11drm/i915: implement WaClearTdlStateAckDirtyBitsTim Gore1-0/+12
2016-04-06drm/i915: Set invert bit for hpd based on VBTShubhangi Shrivastava1-0/+6
2016-04-05drm/i915: Use GPLL ref clock to calculate GPU freqs on VLV/CHVVille Syrjälä1-0/+1
2016-04-05drm/i915/guc: reset GuC and retry on firmware load failureArun Siluvery1-0/+1
2016-04-05drm/i915/chv: add more IOSF port definitionsJani Nikula1-0/+4
2016-04-01drm/i915: Implement WaPixelRepeatModeFixForC0:chvVille Syrjälä1-0/+4
2016-04-01drm/i915: BXT DDI PHY sequence BUNVandana Kannan1-0/+1
2016-03-24drm/i915/bxt: Fix DSI HW state readoutImre Deak1-0/+2
2016-03-22drm/i915/bxt: Initialize MIPI DSI for BXTShashank Sharma1-0/+1
2016-03-21drm/i915: Implement color management on chvLionel Landwerlin1-0/+31
2016-03-21drm/i915: Implement color management on bdw/skl/bxt/kblLionel Landwerlin1-0/+22
2016-03-21drm/i915: Add Haswell CS GPR registers to whitelistJordan Justen1-0/+4
2016-03-18drm/i915/gen9: add WaClearFlowControlGpgpuContextSaveTim Gore1-0/+1
2016-03-17drm/i915: Modify reset func to handle per engine resetsMika Kuoppala1-0/+2
2016-03-16drm/i915/bxt: fix dsi hw state pipe readoutJani Nikula1-0/+1
2016-03-16drm/i915/dsi: lose the loose 666 format name in favor of packedJani Nikula1-2/+2
2016-03-04drm/i915: Read out hrawclk from CCK on vlv/chvVille Syrjälä1-0/+1
2016-03-03drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwardsDeepak M1-46/+50
2016-03-01drm/i915: Read out VGA dotclock properly on LPTVille Syrjälä1-2/+6
2016-02-22drm/i915/gen9: Extend dmc debug mask to include coresMika Kuoppala1-0/+1
2016-02-15drm/i915: Fix hpd live status bits for g4xVille Syrjälä1-7/+8
2016-02-10drm/i915: Handle PipeC fused off on IVB/HSW/BDWGabriel Feceoru1-0/+1
2016-02-10drm/i915/skl: Fix typo in DPLL_CFGCR1 definitionLyude1-1/+1
2016-02-05drm/i915/bxt: Check BIOS RC6 setup before enabling RC6Sagar Arun Kamble1-0/+11
2016-02-04drm/i915: Extend gpio read/write to other coresDeepak M1-0/+2
2016-02-04drm/i915/vlv: drop unused vlv_gps_core_read/write functionsJani Nikula1-1/+0
2016-02-04drm/i915: put the IOSF port defines in numerical orderJani Nikula1-5/+5
2016-02-04drm/i915: implement WaIncreaseDefaultTLBEntriesTim Gore1-0/+7
2016-02-02drm/i915/skl/kbl: Add support for pipe fusingPatrik Jakobsson1-0/+3
2016-01-25drm/i915/skl: Enable Per context Preemption granularity controlArun Siluvery1-0/+3
2016-01-25drm/i915/bxt: Add GEN9_CS_DEBUG_MODE1 to HW whitelistArun Siluvery1-0/+1
2016-01-25drm/i915/gen9: Add HDC_CHICKEN1 to HW whitelistArun Siluvery1-0/+2
2016-01-25drm/i915/gen9: Add GEN8_CS_CHICKEN1 to HW whitelistArun Siluvery1-0/+2
2016-01-25drm/i915/gen9: Add framework to whitelist specific GPU registersArun Siluvery1-0/+3
2016-01-18Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queuedDaniel Vetter1-24/+24
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