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path: root/drivers/gpu/drm/i915/i915_pci.c
AgeCommit message (Expand)AuthorFilesLines
2019-06-17drm/i915: move modesetting core code under display/Jani Nikula1-1/+2
2019-06-17drm/i915/icl: Add Multi-segmented gamma supportShashank Sharma1-1/+1
2019-06-09drm/i915/guc: always use Command Transport BuffersDaniele Ceraolo Spurio1-1/+0
2019-05-31drm/i915: add force_probe module parameter to replace alpha_supportJani Nikula1-5/+46
2019-05-28drm/i915/guc: Enable GuC CTB communication on Gen11Michal Wajdeczko1-0/+1
2019-05-06drm/i915: Move w/a 0477/WaDisableIPC:skl into intel_init_ipc()Ville Syrjälä1-2/+0
2019-04-19drm/i915: Track HAS_RPS alongside HAS_RC6 in the device infoChris Wilson1-0/+5
2019-04-08drm/i915: extract intel_fbdev.h from intel_drv.hJani Nikula1-0/+1
2019-04-03drm/i915: Expose full 1024 LUT entries on ivb+Ville Syrjälä1-1/+1
2019-04-03drm/i915: Expose the legacy LUT via the GAMMA_LUT/GAMMA_LUT_SIZE props on gen2/3Ville Syrjälä1-0/+5
2019-04-03drm/i915: Add "10.6" LUT mode for i965+Ville Syrjälä1-0/+6
2019-04-03drm/i915: Add 10bit LUT for ilk/snbVille Syrjälä1-0/+4
2019-04-03drm/i915: Implement split/10bit gamma for ivb/hswVille Syrjälä1-3/+3
2019-04-01drm/i915: Introduce concept of a sub-platformTvrtko Ursulin1-1/+1
2019-04-01drm/i915: Split Pineview device info into desktop and mobileTvrtko Ursulin1-2/+10
2019-03-22drm/i915/ehl: Add ElkhartLake platformBob Paauwe1-1/+1
2019-03-22drm/i915/ehl: Add EHL platform info and PCI IDsJames Ausmus1-0/+9
2019-03-19drm/i915/cml: Add CML PCI IDSAnusha Srivatsa1-0/+2
2019-03-15drm/i915: Drop address size from ppgtt_typeChris Wilson1-2/+2
2019-03-15drm/i915: Record platform specific ppGTT size in intel_device_infoChris Wilson1-6/+12
2019-03-07drm/i915/icl: Remove alpha support protectionJosé Roberto de Souza1-1/+0
2019-03-06drm/i915: Populate pipe_offsets[] & co. accuratelyVille Syrjälä1-42/+104
2019-03-05drm/i915: Store the BIT(engine->id) as the engine's maskChris Wilson1-17/+22
2019-02-28drm/i915: Make request allocation caches globalChris Wilson1-3/+5
2019-02-20Merge drm/drm-next into drm-intel-next-queuedJoonas Lahtinen1-0/+2
2019-02-13drm/i915/icl: Add degamma and gamma lut size to gen11 capsUma Shankar1-1/+2
2019-02-13drm/i915/glk: Fix degamma lut programmingUma Shankar1-1/+1
2019-02-11Merge tag 'drm-intel-next-2019-02-07' of git://anongit.freedesktop.org/drm/dr...Dave Airlie1-5/+9
2019-02-05drm/i915: Rename HAS_GMCHRodrigo Vivi1-5/+5
2019-02-05drm/i915: Allocate active tracking nodes from a slabcacheChris Wilson1-0/+4
2019-02-04Merge tag 'drm-intel-next-2019-02-02' of git://anongit.freedesktop.org/drm/dr...Dave Airlie1-2/+9
2019-01-31drm/i915/cfl: Adding another PCI Device ID.Rodrigo Vivi1-0/+1
2019-01-30drm/i915: Apply LUT validation checks to platforms more accurately (v3)Matt Roper1-2/+8
2019-01-24drm: Split out drm_probe_helper.hDaniel Vetter1-0/+2
2019-01-03drm/i915: Always try to reset the GPU on takeoverChris Wilson1-0/+5
2018-12-31drm/i915: Remove has_pooled_eu static initializerTvrtko Ursulin1-1/+0
2018-12-03drm/i915: Move display device info capabilities to its own structJosé Roberto de Souza1-53/+64
2018-11-21drm/i915: Make pipe/transcoder offsets not depend on enum valuesImre Deak1-14/+38
2018-11-15drm/i915: remove excess line continuation backslashesJani Nikula1-2/+2
2018-11-02drm/i915: remove palette_offsets from device info in favor of _PICK()Jani Nikula1-5/+2
2018-10-22drm/i915/icl: Define TRANS_CONF register for DSIMadhav Chauhan1-0/+3
2018-10-22drm/i915/icl: Define TRANS_DDI_FUNC_CTL DSI registersMadhav Chauhan1-0/+3
2018-10-11drm/i915/aml: Add new Amber Lake PCI IDJosé Roberto de Souza1-1/+2
2018-09-27drm/i915: Remove i915.enable_ppgtt overrideChris Wilson1-11/+6
2018-09-26drm/i915: Move SKL IPC WA to HAS_IPC()José Roberto de Souza1-0/+2
2018-08-17drm/i915: Do not redefine the has_csr parameter.Anusha Srivatsa1-1/+0
2018-08-06drm/i915: kill resource streamer supportLucas De Marchi1-4/+0
2018-08-06drm/i915/icl: move has_resource_streamer to GEN11_FEATURESLucas De Marchi1-1/+1
2018-08-01drm/i95: Mark GGTT as incoherent for gen10+Chris Wilson1-0/+1
2018-07-20drm/i915: Only force GGTT coherency w/a on required chipsetsChris Wilson1-0/+10
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