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path: root/drivers/gpu/drm/i915/i915_drv.h
AgeCommit message (Expand)AuthorFilesLines
2013-06-13drm/i915: add batch bo to i915_add_request()Mika Kuoppala1-2/+9
2013-06-13drm/i915: change i915_add_request to macroMika Kuoppala1-3/+5
2013-06-13drm/i915: add i915_gem_context_get_hang_stats()Mika Kuoppala1-0/+4
2013-06-13drm/i915: add struct i915_ctx_hang_statsMika Kuoppala1-0/+10
2013-06-12drm/i915: hw state readout and cross-checking for shared dpllsDaniel Vetter1-0/+3
2013-06-12drm/i915: display pll hw state readout and checkingDaniel Vetter1-0/+7
2013-06-12drm/i915: WARN if the fence pin_count is invalidChris Wilson1-0/+1
2013-06-10drm/i915: enable/disable hooks for shared dpllsDaniel Vetter1-1/+6
2013-06-10drm/i915: scrap register address storageDaniel Vetter1-3/+0
2013-06-10drm/i915: metadata for shared dpllsDaniel Vetter1-8/+11
2013-06-10drm/i915: switch crtc->shared_dpll from a pointer to an enumDaniel Vetter1-0/+7
2013-06-10drm/i915: s/pch_pll/shared_dpll/Daniel Vetter1-3/+3
2013-06-06i915/drm: Add private api for power well usageWang Xingchao1-0/+12
2013-06-04drm/i915: move find_pll callback to dev_priv->displayDaniel Vetter1-0/+20
2013-06-03drm/i915: remove i915_hangcheck_hungMika Kuoppala1-1/+0
2013-06-03drm/i915: Rename the gtt_list to global_listBen Widawsky1-1/+1
2013-05-31drm/i915: add enable_ips module optionPaulo Zanoni1-0/+1
2013-05-31drm/i915: add HAS_VEBOXXiang, Haihao1-0/+2
2013-05-31drm/i915: track ring progression using seqnosMika Kuoppala1-2/+0
2013-05-31drm/i915: add "enable" argument to intel_update_sprite_watermarksPaulo Zanoni1-1/+2
2013-05-23drm/i915: change VLV IOSF sideband accessors to not return error codeJani Nikula1-3/+3
2013-05-23drm/i915: rename VLV IOSF sideband functions logicallyJani Nikula1-5/+5
2013-05-23drm/i915: group sideband register accessors to a new fileJani Nikula1-0/+8
2013-05-23drm/i915: avoid big kmallocs on reading error stateMika Kuoppala1-2/+14
2013-05-21drm/i915: remove intel_update_linetime_watermarksPaulo Zanoni1-2/+0
2013-05-10drm/i915: Organize VBT stuff inside drm_i915_privateRodrigo Vivi1-25/+32
2013-05-10drm/i915: BIOS and power context stolen mem handling for VLV v7Jesse Barnes1-0/+2
2013-05-10drm/i915: HSW: allow PCH clock gating for suspendImre Deak1-0/+1
2013-05-10drm/i915: add intel_display_power_enabledPaulo Zanoni1-0/+18
2013-05-10drm/i915: Fix declaration of intel_gmbus_{is_forced_bit/is_port_falid}Jan-Simon Möller1-2/+2
2013-05-06drm/i915: add context into request structMika Kuoppala1-0/+3
2013-04-30drm/i915: reference count for i915_hw_contextsMika Kuoppala1-0/+12
2013-04-30drm/i915: move lvds_border_bits to pipe_configDaniel Vetter1-2/+0
2013-04-30drm/i915: cleanup opregion asle pipestat enableJani Nikula1-4/+0
2013-04-25drm/i915: move PCH pfit controls into pipe_configJesse Barnes1-2/+0
2013-04-25drm/i915: drop code duplication in favor of asle interrupt handlerJani Nikula1-2/+0
2013-04-25drm/i915: protect backlight registers and data with a spinlockJani Nikula1-0/+1
2013-04-24drm/i915: make sure GPU freq drops to minimum after entering RC6 v4Jesse Barnes1-0/+2
2013-04-23drm/i915: Turn HAS_FPGA_DBG_UNCLAIMED into a device_info flagDamien Lespiau1-2/+3
2013-04-23drm/i915: Introduce HAS_FPGA_DBG_UNCLAIMED()Damien Lespiau1-0/+1
2013-04-23drm/i915: Turn HAS_DDI() into a device_info flagDamien Lespiau1-2/+3
2013-04-23drm/i915: Use DEV_INFO_FOR_EACH_FLAG() to declare flags as wellDamien Lespiau1-24/+7
2013-04-23drm/i915: Turn DEV_INFO_FLAGS into a foreach style macroDamien Lespiau1-25/+25
2013-04-23drm/i915: Add bit field to record which pins have received HPD events (v3)Egbert Eich1-0/+1
2013-04-22drm/i915: Add PTE encoding function to the gtt/ppgtt vtables.Kenneth Graunke1-0/+8
2013-04-18drm/i915: turbo & RC6 support for VLV v7Jesse Barnes1-0/+5
2013-04-18drm/i915: VLV GPU frequency to opcode functionsJesse Barnes1-0/+2
2013-04-18drm/i915: Use alphabetical names for spritesVille Syrjälä1-0/+2
2013-04-18drm/i915: set CPT FDI RX polarity bits based on VBTPaulo Zanoni1-0/+1
2013-04-18drm/i915: Add Reenable Timer to turn Hotplug Detection back on (v4)Egbert Eich1-0/+1
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