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path: root/drivers/gpu/drm/gma500/cdv_intel_display.c
AgeCommit message (Expand)AuthorFilesLines
2014-04-01drm: Replace crtc fb with primary plane fb (v3)Matt Roper1-1/+1
2014-03-17drm/gma500/cdv: Cedarview display cleanupsPatrik Jakobsson1-52/+19
2013-08-15drm/gma500/cdv: Add and hook up chip op for disabling srPatrik Jakobsson1-3/+3
2013-08-14drm/gma500/cdv: Add and hook up chip op for watermarksPatrik Jakobsson1-1/+1
2013-07-24drm/gma500: Rename psb_intel_encoder to gma_encoderPatrik Jakobsson1-5/+5
2013-07-24drm/gma500: Rename psb_intel_crtc to gma_crtcPatrik Jakobsson1-14/+14
2013-07-24drm/gma500/cdv: Convert to generic set_config()Patrik Jakobsson1-20/+1
2013-07-24drm/gma500/cdv: Convert to generic save/restorePatrik Jakobsson1-170/+2
2013-07-24drm/gma500: Convert to generic encoder funcsPatrik Jakobsson1-2/+2
2013-07-24drm/gma500/cdv: Convert to generic cursor funcsPatrik Jakobsson1-128/+2
2013-07-24drm/gma500/cdv: Convert to generic gamma funcsPatrik Jakobsson1-69/+1
2013-07-24drm/gma500/cdv: Convert to gma_crtc_dpms()Patrik Jakobsson1-134/+3
2013-07-24drm/gma500/cdv: Convert to gma_pipe_set_base()Patrik Jakobsson1-76/+1
2013-07-24drm/gma500/cdv: Use identical generic crtc funcsPatrik Jakobsson1-58/+16
2013-07-24drm/gma500: Make use of gma_pipe_has_type()Patrik Jakobsson1-4/+4
2013-07-24drm/gma500/cdv: Make use of the generic clock codePatrik Jakobsson1-163/+34
2013-06-09drm/gma500/cdv: Fix cursor gem obj referencing on cdvPatrik Jakobsson1-5/+11
2013-06-09drm/gma500/cdv: Unpin framebuffer on crtc disablePatrik Jakobsson1-0/+14
2012-08-24gma500: psb_intel_crtc: Drop crtc_enable flag.Forest Bond1-2/+0
2012-08-24gma500: Fix comment mispelling in cdv_intel_limits definition.Forest Bond1-1/+1
2012-08-24gma500/cdv: Fix call to cdv_intel_dp_set_m_nAlan Cox1-2/+2
2012-08-24gma500/cdv: Add eDP supportZhao Yakui1-2/+40
2012-08-24gma500/cdv: sync up and add the displayport code to the buildAlan Cox1-3/+3
2012-08-24gma500/cdv: add the bits that don't need the new codeAlan Cox1-2/+97
2012-08-24gma500: Program the DPLL lane based on the selected digitial portZhao Yakui1-31/+51
2012-08-24gma500: Fix incorrect SR issue when disabling CRTC already in disabled stateZhao Yakui1-4/+3
2012-07-19drm: Make the .mode_fixup() operations mode argument a const pointerLaurent Pinchart1-1/+1
2012-05-11gma500: use the register map to clean upAlan Cox1-155/+135
2012-05-11gma500: introduce a structure describing each pipeAlan Cox1-23/+10
2012-04-27cdv: continue synching up with updated reference codeAlan Cox1-34/+27
2012-04-27gma500: Update the Cedarview clock handlingAlan Cox1-65/+266
2012-03-10gma500: cdv_intel_crt: mark few functions as staticKirill A. Shutemov1-3/+3
2012-03-10gma500: cdv_intel_crt: drop unused variablesKirill A. Shutemov1-9/+1
2012-03-10gma500: cdv_intel_crt: drop dead codeKirill A. Shutemov1-47/+0
2012-03-10gma500: rework register stuff sanelyAlan Cox1-15/+16
2012-03-10gma500: now move the Oaktrail save state into its own structureAlan Cox1-11/+16
2011-12-20gma500: Convert Cedarview to work with new output handlingPatrik Jakobsson1-7/+7
2011-12-20drm: Replace pitch with pitches[] in drm_framebufferVille Syrjälä1-2/+2
2011-11-16gma500: Add support for CedarviewAlan Cox1-0/+1508
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