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path: root/drivers/gpu/drm/amd/pm
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2021-03-10drm/amd/pm: correct the watermark settings for PolarisEvan Quan1-4/+4
The "/ 10" should be applied to the right-hand operand instead of the left-hand one. Signed-off-by: Evan Quan <evan.quan@amd.com> Noticed-by: Georgios Toptsidis <gtoptsid@gmail.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2021-03-10drm/amd/pm: bug fix for pcie dpmKenneth Feng3-21/+141
Currently the pcie dpm has two problems. 1. Only the high dpm level speed/width can be overrided if the requested values are out of the pcie capability. 2. The high dpm level is always overrided though sometimes it's not necesarry. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2021-03-03drm/amd/pm: correct Arcturus mmTHM_BACO_CNTL register addressEvan Quan1-3/+12
Arcturus has a different register address from other SMU V11 ASICs. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2021-03-03drm/amdgpu/swsmu/vangogh: Only use RLCPowerNotify msg for disableAlex Deucher1-2/+2
Per discussions with PMFW team, the driver only needs to notify the PMFW when the RLC is disabled. The RLC FW will notify the PMFW directly when it's enabled. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-03drm/amdgpu/pm: make unsupported power profile messages debugAlex Deucher3-3/+3
Making them an error confuses users and the errors are harmless as not all asics support all profiles. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1488 Acked-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-22drm/amd/pm/swsmu: Avoid using structure_size uninitialized in ↵Nathan Chancellor1-1/+1
smu_cmn_init_soft_gpu_metrics Clang warns: drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu_cmn.c:764:2: warning: variable 'structure_size' is used uninitialized whenever switch default is taken [-Wsometimes-uninitialized] default: ^~~~~~~ drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu_cmn.c:770:23: note: uninitialized use occurs here memset(header, 0xFF, structure_size); ^~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu_cmn.c:753:25: note: initialize the variable 'structure_size' to silence this warning uint16_t structure_size; ^ = 0 1 warning generated. Return in the default case, as the size of the header will not be known. Fixes: de4b7cd8cb87 ("drm/amd/pm/swsmu: unify the init soft gpu metrics function") Link: https://github.com/ClangBuiltLinux/linux/issues/1304 Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/pm: make the error log more clear for fine grain tuning functionXiaojian Du3-3/+5
This patch is to make the error log more clear for fine grain tuning function, it covers Raven/Raven2/Picasso/Renoir/Vangogh. The fine grain tuning function uses the sysfs file -- pp_od_clk_voltage, but only when another sysfs file -- power_dpm_force_performance_level is switched to "manual" mode, it is allowed to access "pp_od_clk_voltage". Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Acked-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/pm: enable LCLK DSKenneth Feng1-0/+3
Enable LCLK deep sleep and it works if we enable ASPM: modprobe amdgpu aspm=1 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/pm: add support for hwmon control of slow and fast PPT limit on vangoghXiaomeng Hou6-18/+204
Implement hwmon API for reading/setting slow and fast PPT limit. APU power is managed to system-level requirements through the PPT (package power tracking) feature. PPT is intended to limit power to the requirements of the power source and could be dynamically updated to maximize APU performance within the system power budget. Here FAST_PPT_LIMIT manages the ~10 ms moving average of APU power, while SLOW_PPT_LIMIT manages the configurable, thermally significant moving average of APU power (default ~5000 ms). User could read slow/fast ppt limit using command "cat power*_cap" or "sensors" in the hwmon device directory. User could adjust values of slow/fast ppt limit as needed depending on workloads through command "echo ## > power*_cap". Example: $ echo 15000000 > power1_cap $ echo 18000000 > power2_cap $ sensors amdgpu-pci-0300 Adapter: PCI adapter slowPPT: 9.04W (cap = 15.00 W) fastPPT: 9.04W (cap = 18.00 W) v2: align with existing interfaces for the getting/setting of PPT limits. Encode the upper 8 bits of limit value to distinguish slow and fast power limit type. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/pm: modify the power limit level parameter from bool to enum typeXiaomeng Hou3-5/+21
The original smu_get_power_limit callback accepts the power limit level parameter as bool which limits to max and current. For possible needs to retrieve other level like min, extend the parameter type using enum. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/pm: update the smu v11.5 smc header for vangoghXiaomeng Hou2-1/+9
Add PP messages for reading/setting Fast PPT and Slow PPT limit. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/pm/swsmu: unify the init soft gpu metrics functionKevin Wang11-47/+45
the soft gpu metrics is not asic related data structure. unify them to reduce duplicate code. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/pm: enable DCSKenneth Feng1-0/+5
Enable DCS V1: Enable Async DCS. V2: Add the ppfeaturemask bit to enable from the modprobe parameter. V3: 1. add the flag to skip APU support. 2. remove the hunk for workload selection since it doesn't impact the function. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu/smu12: fix power reporting on renoirAlex Deucher1-1/+1
Align with Vangogh. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1467 Acked-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/pm: enable ACDC featureKenneth Feng1-0/+3
The power limit and clock ragne are different in AC mode and DC mode. Firmware does the setting after this feature is enabled. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-02drm/amdgpu: Prevent shift wrapping in amdgpu_read_mask()Dan Carpenter1-3/+3
If the user passes a "level" value which is higher than 31 then that leads to shift wrapping. The undefined behavior will lead to a syzkaller stack dump. Fixes: 5632708f4452 ("drm/amd/powerplay: add dpm force multiple levels on cz/tonga/fiji/polaris (v2)") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-02drm/amd/pm: Disable GFXOFF when GFX DPM or PG disabledJinzhou Su1-4/+10
Check GFX DPM and PG bit before enable GFXOFF on Vangogh smu post init. Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-02drm/amd/pm: remove some useless code for vangoghXiaojian Du1-3/+0
This patch is to remove some useless code for vangogh. In the earlier code, vangogh can't finish all the sequence of smu late init. But now vangogh has one stable work state,so remove the useless code. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-02drm/amd/pm: fill in the data member of v2 gpu metrics table for vangoghXiaojian Du1-0/+3
This patch is to fill in the data member of v2 gpu metrics table for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-01drm/amdgpu/swsmu: use percent rather than rpm for manual fan control (v2)Alex Deucher7-103/+86
On some boards the rpm interface apparently does not work at all leading to the fan not spinning or spinning at strange speeds. Both interfaces work properly on the boards I have. Let's try and use the percent interface instead. v2: rebase on revert Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1408 Reviewed-by: Evan Quan <evan.quan@amd.com> (v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-01Revert "drm/amdgpu/swsmu: drop set_fan_speed_percent (v2)"Alex Deucher7-9/+39
On some boards the rpm interface apparently does not work at all leading to the fan not spinning or spinning at strange speeds. Revert this for now to fix 5.10, 5.11. The follow on patch fixes this properly for 5.12. This reverts commit 8d6e65adc25e23fabbc5293b6cd320195c708dca. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1408 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-01drm/amd/pm: correct string parsing for extra separator characters caseEvan Quan1-0/+2
Supplement of previous fix. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-01drm/amdgpu/pm: Account for extra separator characters in sysfs interfaceMatt Coffin1-0/+2
Currently, the the input to the pp_od_clk_voltage sysfs interface has two adjacent separator characters, i.e. "\n\0", then we try to parse an argument out of the empty string, whereas we really should just ignore this case, and treat any number of adjacent separators as one separator for arguments. We do this here by simply skipping the argument parsing for all empy-string arguments. An example test case would be `echo 's 1 900' > pp_od_clk_voltage` (note the two spaces after the 's'. This also solves the issue where the written string ends with both a newline, and a nul-terminator, '\n\0', as is the case for `echo 's 1 900' > pp_od_clk_voltage` since the recent rebase. Got lost during code rebase/merge. No need to port this to other branches. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Matt Coffin <mcoffin13@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-01Revert "Revert "drm/amdgpu: Fix NULL dereference in dpm sysfs handlers""Evan Quan1-6/+3
This reverts commit 2456c290a7889be492cb96092b62d16c11176f72. Got lost during code rebase/merge. No need to port this to other branches. Signed-off-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-25drm/amd/pm: store and reinstate swsmu user power configurationsArunpravin2-4/+159
store swsmu user power configurations which include power limit, clock frequencies, fan speed and fan mode on suspend and reinstate on resume. V2: Addressed Lijo's review comments added a function to set clock interdependencies add check on fan control mode to reapply fan speed V3: Addressed review comments from Alex moved store logic and reinstate function call into swSMU V4: added a logic to keep off storing configurations in suspend V5: Addressed review comments from Lijo add a restore flag give restore priority to mclk comparing fclk and socclk Signed-off-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-21drm/amd/pm: print the timeout of smc messageHuang Rui1-3/+8
This patch is to help firmware designer to know the smc message timeout status. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-21drm/amdgpu/pm: no need GPU status set since ↵Prike Liang1-1/+1
mmnbif_gpu_BIF_DOORBELL_FENCE_CNTL added in FSDL In the renoir there is no need GpuChangeState message set to exit gfxoff in the s0i3 resume since mmnbif_gpu_BIF_DOORBELL_FENCE_CNTL has been added in the s0i3 FSDL. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-20drm/amd/pm: remove unused message SMU_MSG_SpareXKevin Wang3-6/+0
the SpareX is reserved by SMU firmware, the driver is never use it. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-19drm/amdgpu: fix build error without x86 kconfig (v2)Huang Rui3-7/+16
This patch is to fix below build error while we are using the kconfig without x86. drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c: In function 'vangogh_get_smu_metrics_data': drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:300:10: error: 'boot_cpu_data' undeclared (first use in this function); did you mean 'boot_cpuid'? 300 | boot_cpu_data.x86_max_cores * sizeof(uint16_t)); | ^~~~~~~~~~~~~ | boot_cpuid drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c: In function 'vangogh_read_sensor': drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:1320:11: error: 'boot_cpu_data' undeclared (first use in this function); did you mean 'boot_cpuid'? 1320 | *size = boot_cpu_data.x86_max_cores * sizeof(uint16_t); | ^~~~~~~~~~~~~ | boot_cpuid drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c: In function 'vangogh_od_edit_dpm_table': drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:1460:19: error: 'boot_cpu_data' undeclared (first use in this function); did you mean 'boot_cpuid'? 1460 | if (input[0] >= boot_cpu_data.x86_max_cores) { | ^~~~~~~~~~~~~ | boot_cpuid v2: fix #ifdef and add comment for APU only Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-15drm/amd/pm: update driver if version for navy_flounderJiansong Chen1-1/+1
It's in accordance with pmfw 65.22.0 for navy_flounder. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-14drm/amd/pm: modify the fine grain tuning function for vangoghXiaojian Du2-6/+48
This patch is to modify the fine grain tuning function for vangogh. This patch uses the existing old flag to make the two sysfs files work separately -- "power_dpm_force_performance_level" and "pp_od_clk_voltage". Only the power_dpm_force_performance_level is switched to "manual" mode, the fine grain tuning function will be started. In other mode, including "high","low","min_sclk","min_mclk", "standard" and "peak", the fine grain tuning function will be shut down, and the frequency range of gfx and cpu clock will be restored the default values. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-14drm/amd/pm: modify the fine grain tuning function for RenoirXiaojian Du4-23/+6
This patch is to modify the fine grain tuning function for Renoir. The fine grain tuning function uses the sysfs node -- pp_od_clk_voltage to config gfxclk. Meanwhile, another sysfs node -- power_dpm_force_perfomance_level also affects the gfx clk. It will cause confusion when these two sysfs nodes works together. It is risky to add two new flags to common smu struct, so this patch uses the existing flag to make these two sysfs nodes works separately. Only when power_dpm_force_perfomance_level is changed to "manual" mode, the fine grain function will be started. In other profile modes, including "auto", "high", "low", "profile_peak", "profile_standard", "profile_min_sclk", "profile_min_mclk", the fine grain tuning function will be shut down and the frequency range of gfx will be restored the default value. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13drm: amdgpu: pm: Mark vangogh_clk_dpm_is_enabled() as staticSouptick Joarder1-1/+1
kernel test robot throws below warnings -> drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:594:6: warning: no previous prototype for 'vangogh_clk_dpm_is_enabled' [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:594:6: warning: no previous prototype for function 'vangogh_clk_dpm_is_enabled' [-Wmissing-prototypes] Mark vangogh_clk_dpm_is_enabled() as static. Reviewed-by: Huang Rui <ray.huang@amd.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13drm/amd/pm: implement processor fine grain feature for vangogh (v3)Huang Rui4-1/+104
This patch is to implement the processor fine grain feature for vangogh. It's similar with gfx clock, the only difference is below: echo "p core_id level value" > pp_od_clk_voltage 1. "p" - set the cclk (processor) frequency 2. "core_id" - 0/1/2/3, represents which cpu core you want to select 2. "level" - 0 or 1, "0" represents the min value, "1" represents the max value 3. "value" - the target value of cclk frequency, it should be limited in the safe range v2: fix some missing changes as Evan's suggestion. v3: add version check and fix the restore. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13drm/amd/pm: implement the processor clocks which read by metricHuang Rui4-0/+52
The core processor clocks will be stored in smu metric table, then we add this runtime information into amdgpu_pm_info interface. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13drm/amd/pm: add the workload map for vangoghXiaojian Du1-0/+1
This patch is to add the workload map for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13drm/amd/pm: fix one superfluous error for renoirXiaojian Du1-0/+4
This patch is to fix one superfluous error for renoir. Renoir supports 5 kinds of power profile mode: "FULL SCREEN 3D", "VIDEO", "VR", "COMPUTE" and "CUSTOM". After loading amdgpu driver, the driver will set "BOOTUP_DEFAULT" mode to APU, and it will get one superfluouserror error, which is saying "Unsupported power profile mode 0 on RENOIR", but it will not make any other harmful events, so fix this error. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13drm/amd/pm: support the function to change power profile mode for vangoghXiaojian Du1-1/+14
This patch is to support the function to change power profile mode for vangogh. Vangogh supports 5 kinds of power profile mode: "FULL SCREEN 3D", "VIDEO", "VR", "COMPUTE" and "CUSTOM". Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13drm/amd/pm: Enable GfxOff for VangoghJinzhou Su2-0/+9
Add Enable gfxoff for Vangogh during smu_post_init. System will not enter GfxOff without allow message. Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13drm/amd/pm: Add GFXOFF interface for VangoghJinzhou Su1-1/+3
Steps to enter gfxoff mode on Vangogh 1. Send EnableGfxOff message to SMU 2. Send AllowGfxOff message to SMU Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13drm/amd/pm: fix the return value of pm messageHuang Rui1-0/+1
0 should be right driver return value, 0x1 is the right firmware return value. So switch to 0 at last. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Xiaojian Du <xiaojian.du@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13drm/amdgpu: revise the mode2 reset for vangoghHuang Rui3-22/+47
PCIE MMIO bar needs to be restored firstly after the reset event triggers. So it's unable to access the registers to wait for response from SMU. Becasue the value of mmMP1_SMN_C2PMSG_90 is invalid at that moment. Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13drm/amdgpu: add mode2 reset support for vangoghAlex Deucher1-0/+6
GPU reset is handled via SMU similar to previous APUs. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com>
2021-01-13drm/amd/pm: don't mark all apu as true on feature maskHuang Rui1-1/+3
VHG based APU will support feature mask checking. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13drm/amd/pm: initial feature_enabled/feature_support bitmap for vangoghHuang Rui1-4/+22
VanGogh supports feature mask checking which exposed by smu firmware. It has to initial at first, otherwise, all SMU_FEATURE_xxx masks are invalid. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13drm/amd/pm: clean up get_allowed_feature_mask functionHuang Rui1-43/+0
The get_allowed_feature_mask is superfluous on vangogh. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13drm/amd/pm: enhance the real response for smu message (v2)Huang Rui1-5/+9
The user prefers to know the real response value from C2PMSG 90 register which is written by firmware not -EIO. v2: return C2PMSG 90 value Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13drm/amd/pm: remove vcn/jpeg powergating feature checking for vangoghHuang Rui1-20/+12
VCN/JPEG PG won't be a feature mask bit which exposed by vangogh smu firmware. So remove it. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-11drm/amd/pm/powerplay/hwmgr/vega10_hwmgr: Fix worthy function headers, demote ↵Lee Jones1-4/+6
barely documented one Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1556: warning: Function parameter or member 'acg_freq' not described in 'vega10_populate_single_gfx_level' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1621: warning: Function parameter or member 'current_soc_did' not described in 'vega10_populate_single_soc_level' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1621: warning: Function parameter or member 'current_vol_index' not described in 'vega10_populate_single_soc_level' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1621: warning: Excess function parameter 'current_socclk_level' description in 'vega10_populate_single_soc_level' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1757: warning: Function parameter or member 'current_mem_vid' not described in 'vega10_populate_single_memory_level' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1757: warning: Function parameter or member 'current_memclk_level' not described in 'vega10_populate_single_memory_level' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1757: warning: Function parameter or member 'current_mem_soc_vind' not described in 'vega10_populate_single_memory_level' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:2871: warning: Function parameter or member 'bitmap' not described in 'vega10_start_dpm' Cc: Evan Quan <evan.quan@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-11drm/amd/pm/powerplay/hwmgr/vega10_hwmgr: Fix a bunch of kernel-doc ↵Lee Jones1-68/+65
formatting issues Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:5474:5: warning: no previous prototype for ‘vega10_hwmgr_init’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:551: warning: Function parameter or member 'hwmgr' not described in 'vega10_get_evv_voltages' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:609: warning: Function parameter or member 'hwmgr' not described in 'vega10_patch_with_vdd_leakage' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:609: warning: Function parameter or member 'voltage' not described in 'vega10_patch_with_vdd_leakage' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:609: warning: Function parameter or member 'leakage_table' not described in 'vega10_patch_with_vdd_leakage' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:637: warning: Function parameter or member 'hwmgr' not described in 'vega10_patch_lookup_table_with_leakage' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:637: warning: Function parameter or member 'lookup_table' not described in 'vega10_patch_lookup_table_with_leakage' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:637: warning: Function parameter or member 'leakage_table' not described in 'vega10_patch_lookup_table_with_leakage' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1013: warning: Function parameter or member 'hwmgr' not described in 'vega10_trim_voltage_table' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1013: warning: Function parameter or member 'vol_table' not described in 'vega10_trim_voltage_table' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1160: warning: Function parameter or member 'hwmgr' not described in 'vega10_construct_voltage_tables' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1558: warning: Function parameter or member 'hwmgr' not described in 'vega10_populate_single_gfx_level' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1558: warning: Function parameter or member 'gfx_clock' not described in 'vega10_populate_single_gfx_level' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1558: warning: Function parameter or member 'current_gfxclk_level' not described in 'vega10_populate_single_gfx_level' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1558: warning: Function parameter or member 'acg_freq' not described in 'vega10_populate_single_gfx_level' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1613: warning: Cannot understand * @brief Populates single SMC SOCCLK structure using the provided clock. drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1667: warning: Function parameter or member 'hwmgr' not described in 'vega10_populate_all_graphic_levels' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1750: warning: Cannot understand * @brief Populates single SMC GFXCLK structure using the provided clock. drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1811: warning: Cannot understand * @brief Populates all SMC MCLK levels' structure based on the trimmed allowed dpm memory clock states. drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:2496: warning: Function parameter or member 'hwmgr' not described in 'vega10_init_smc_table' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:2867: warning: Cannot understand * @brief Tell SMC to enabled the supported DPMs. Cc: Evan Quan <evan.quan@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-26 06:31:51 +0000