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2019-02-05drm/amd/display: Initialize stream_update to zeroNicholas Kazlauskas1-1/+2
[Why] The stream_update struct is left unitialized but DC will access its fields. This usually results in global state validation occur during any atomic commit with state->allow_modeset = true. [How] Initialize the struct to zero for every stream we check. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-05drm/amd/display: Reformat dm_determine_update_type_for_commitNicholas Kazlauskas1-61/+65
[Why] The indenting for this function is a few levels too deep and can be simplified a fair bit. This patch is in preparation for functional changes that fix update type determination to occur less frequently and more accurately. [How] Place checks early and exit/continue when possible. This isn't a functional change. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-05drm/amd/display: Use the right surface for flip and FreeSyncNicholas Kazlauskas1-13/+4
[Why] We were always passing the first surface on the stream status for flip updates when we should be using the surface associated with the plane. [How] Use the dc_plane_state from the plane that's being updated. FreeSync should also only keep track of updates from the primary plane, so the check needed to be updated. The acrtc->stream state doesn't need to be checked for NULL before updating FreeSync either since there needs to be a stream to be inside this function as a prerequisite. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-05drm/amd/display: Apply all surface updates onto surfacesNicholas Kazlauskas2-17/+96
[Why] Most surface updates weren't propagated onto the surface during dc_commit_updates_for_stream. This makes it more difficult for DC to determine the actual surface update type required. [How] Use copy_surface_update_to_plane to propagate the changes. The FreeSync surface timing information update for BTR has been moved out of amdgpu_dm.c into this function as well. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-05drm/amd/display: Use udelay when waiting between aux retriesJohn Barberiz1-1/+1
[Why] "IRQ_HPD Pulse Length Test" DP compliance test fails. Test complains that certain DPCD registers are not read within 100 ms. [How] msleep is inaccurate for small values. Used udelay instead for accuracy. Signed-off-by: John Barberiz <John.Barberiz@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-05drm/amd/display: Use context parameters to enable FBCShirish S1-1/+1
[What] FBC fails to get enabled when switched between LINEAR(console/VT) and non-LINEAR(GUI) based rendering due to default value of tiling info stored in the current_state which is used for deciding whether or not to turn FBC on or off. [How] Use context structure's tiling information which is coherant with the screen updates. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-05drm/amd/display: Don't re-enable CRC when CONFIG_DEBUG_FS isn't definedNicholas Kazlauskas1-0/+2
[Why] When CONFIG_DEBUG_FS isn't defined then amdgpu_dm_crtc_set_crc_source is NULL. This causes a compilation error since it's being called unconditionally. [How] Guard the call based on CONFIG_DEBUG_FS - CRC capture isn't supported without this. Cc: Leo Li <sunpeng.li@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Fixes: 43a6a02eb355 ("drm/amd/display: Re-enable CRC capture following modeset") Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-05drm/amd/display: Use memset to initialize variables in fill_plane_dcc_attributesNathan Chancellor1-2/+5
Clang warns: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:2314:38: warning: suggest braces around initialization of subobject [-Wmissing-braces] struct dc_surface_dcc_cap output = {0}; ^ {} Previous efforts to fix this type of warning by adding or removing braces have been met with some pushback in favor of using memset [1][2]. Do that here, mirroring commit 05794eff1aa6 ("drm/amdgpu/gmc: fix compiler errors [-Werror,-Wmissing-braces] (V2)") in this tree. [1]: https://lore.kernel.org/lkml/022e41c0-8465-dc7a-a45c-64187ecd9684@amd.com/ [2]: https://lore.kernel.org/lkml/20181128.215241.702406654469517539.davem@davemloft.net/ Fixes: 7df7e505e82a ("drm/amd/display: Set requested plane state DCC params for GFX9") Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-05drm/amd/display: Use memset to initialize variables in ↵Nathan Chancellor1-2/+5
amdgpu_dm_atomic_commit_tail Clang warns: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5089:60: warning: suggest braces around initialization of subobject [-Wmissing-braces] struct dc_surface_update dummy_updates[MAX_SURFACES] = { 0 }; ^ {} Previous efforts to fix this type of warning by adding or removing braces have been met with some pushback in favor of using memset [1][2]. Do that here, mirroring commit 05794eff1aa6 ("drm/amdgpu/gmc: fix compiler errors [-Werror,-Wmissing-braces] (V2)") in this tree. [1]: https://lore.kernel.org/lkml/022e41c0-8465-dc7a-a45c-64187ecd9684@amd.com/ [2]: https://lore.kernel.org/lkml/20181128.215241.702406654469517539.davem@davemloft.net/ Fixes: 02d6a6fcdf68 ("drm/amd/display: Simplify underscan and ABM commit") Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-05drm/amd/display: Use memset to initialize variable in ↵Nathan Chancellor1-1/+3
wait_for_training_aux_rd_interval Clang warns: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c:50:57: warning: suggest braces around initialization of subobject [-Wmissing-braces] union training_aux_rd_interval training_rd_interval = {0}; ^ {} 1 warning generated. Previous efforts to fix this type of warning by adding or removing braces have been met with some pushback in favor of using memset [1][2]. Do that here, mirroring commit 05794eff1aa6 ("drm/amdgpu/gmc: fix compiler errors [-Werror,-Wmissing-braces] (V2)") in this tree. [1]: https://lore.kernel.org/lkml/022e41c0-8465-dc7a-a45c-64187ecd9684@amd.com/ [2]: https://lore.kernel.org/lkml/20181128.215241.702406654469517539.davem@davemloft.net/ Fixes: 3cec41769d21 ("drm/amd/display: Fix use of uninitialized union") Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-05drm/amd/display: Attach VRR properties for eDP connectorsNicholas Kazlauskas1-1/+2
[Why] eDP was missing in the checks for supported VRR connectors. [How] Attach the properties for eDP connectors too. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=202449 Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-04Merge branch 'drm-next-5.1' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie13-93/+136
into drm-next ttm: - Replace ref/unref naming with get/put amdgpu: - Revert DC clang fix, causes a segfault with some compiler versions - SR-IOV fix - PCIE fix for vega20 - Misc DC fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190201062345.7304-1-alexander.deucher@amd.com
2019-02-04Merge tag 'drm-misc-next-2019-02-01' of ↵Dave Airlie3-3/+3
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 5.1: UAPI Changes: Cross-subsystem Changes: Core Changes: - Split out some part of drm_crtc_helper.h into drm_probe_helper.h - DRIVER_* flags improvements - New tasks on the TODO-list - Improvements to the documentation Driver Changes: - Continual of drmP.h removal in multiple drivers - Removal of FBINFO_(FLAG_)DEFAULT in multiple drivers - sun4i: Addition of the A23 support, multiple fixes for the tiled formats - atmel-hlcdc: Fix of clipping and rotation properties - qxl: various BO-related improvements, prime and generic fbdev emulation support - dw-hdmi: Support for HDMI2.0 2160p modes and YUV420 output - New Sitronix ST7701 panel driver - New Kingdisplay KD097D04 panel driver - New LeMaker BL035-RGB-002 panel driver - New PDA 91-00156-A0 panel driver Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190201144749.t3abxvguhstu6bcl@flea
2019-02-01drm/amd/display: Fix fclk idle stateRoman Li1-1/+9
[Why] The earlier change 'Fix 6x4K displays' led to fclk value idling at higher DPM level. [How] Apply the fix only to respective multi-display configuration. Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-01Merge branch 'drm-next-5.1' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie135-10260/+3109
into drm-next New stuff for 5.1. amdgpu: - DC bandwidth formula updates - Support for DCC on scanout surfaces - Support for multiple IH rings on soc15 asics - Fix xgmi locking - Add sysfs interface to get pcie usage stats - Simplify DC i2c/aux code - Initial support for BACO on vega10/20 - New runtime SMU feature debug interface - Expand existing sysfs power interfaces to new clock domains - Handle kexec properly - Simplify IH programming - Rework doorbell handling across asics - Drop old CI DPM implementation - DC page flipping fixes - Misc SR-IOV fixes amdkfd: - Simplify the interfaces between amdkfd and amdgpu ttm: - Add a callback to notify the driver when the lru changes sched: - Refactor mirror list handling - Rework hw fence processing Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190125231517.26268-1-alexander.deucher@amd.com
2019-01-29Revert "drm/amd/display: add -msse2 to prevent Clang from emitting libcalls ↵Alex Deucher2-2/+2
to undefined SW FP routines" This reverts commit 10117450735c7a7c0858095fb46a860e7037cb9a. Causes a crash. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=109487 Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 4.19
2019-01-28drm/amd/display: Don't leak memory when updating streamsNicholas Kazlauskas1-1/+7
[Why] The flip and full structures were allocated but never freed. [How] Free them at the end of the function. There's a small behavioral change here with the function returning early if the allocation fails but we wouldn't should be doing anything in that case anyway. Fixes: c00e0cc0fdc0 ("drm/amd/display: Call into DC once per multiplane flip") Fixes: ea39594e0855 ("drm/amd/display: Perform plane updates only when needed") Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-28drm/amd/display: Add Vline1 interrupt source to InterruptManagerFatemeh Darbehani6-68/+61
[Why] Enhanced sync need to use vertical_interrupt1. [How] Add vertical_interrupt1 source to irq manger, Implment setup vline interrupt interface. Signed-off-by: Fatemeh Darbehani <fatemeh.darbehani@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-28drm/amd/display: Re-enable CRC capture following modesetNicholas Kazlauskas2-4/+17
[Why] During any modeset the CRTC stream is removed and a new stream is added. This new stream doesn't carry over CRC capture state if it was previously set. [How] Re-program the stream for CRC capture. The existing DRM callback can be re-used here for the most part - the only modification needed is additional locking now that it's called from within commit tail. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-28drm/amd/display: Enable vblank interrupt during CRC captureNicholas Kazlauskas2-22/+34
[Why] In order to read CRC events when CRC capture is enabled the vblank interrput handler needs to be running for the CRTC. The handler is enabled while there is an active vblank reference. When running IGT tests there will often be no active vblank reference but the test expects to read a CRC value. This is valid usage (and works on i915 since they have a CRC interrupt handler) so the reference to the vblank should be grabbed while capture is active. This issue was found running: igt@kms_plane_multiple@atomic-pipe-b-tiling-none The pipe-b is the only one in the initial commit and was not previously active so no vblank reference is grabbed. The vblank interrupt is not enabled and the test times out. [How] Keep a reference to the vblank as long as CRC capture is enabled. If userspace never explicitly disables it then the reference is also dropped when removing the CRTC from the context (stream = NULL). Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-28drm/amd/display: Poll pending down rep before clear payload allocation tableMartin Tsai3-0/+19
[Why] On current design, driver cannot handle the interrupt for down reply when link training is processing. The DOWN REQ send before link training will keep in the pending DOWN REP state in the queue. It makes the next DOWN REQ be queued until time out. [How] To add a polling sequence before clear payload allocation table to make sure the pending DOWN REP can be handled. Signed-off-by: Martin Tsai <martin.tsai@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: add -msse2 to prevent Clang from emitting libcalls to ↵ndesaulniers@google.com2-2/+2
undefined SW FP routines arch/x86/Makefile disables SSE and SSE2 for the whole kernel. The AMDGPU drivers modified in this patch re-enable SSE but not SSE2. Turn on SSE2 to support emitting double precision floating point instructions rather than calls to non-existent (usually available from gcc_s or compiler_rt) floating point helper routines. Link: https://gcc.gnu.org/onlinedocs/gccint/Soft-float-library-routines.html Link: https://github.com/ClangBuiltLinux/linux/issues/327 Cc: stable@vger.kernel.org # 4.19 Reported-by: S, Shirish <Shirish.S@amd.com> Reported-by: Matthias Kaehlcke <mka@google.com> Suggested-by: James Y Knight <jyknight@google.com> Suggested-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> Tested-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Matthias Kaehlcke <mka@chromium.org> Tested-by: Nathan Chancellor <natechancellor@gmail.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: Connect dig_fe to otg directly instead of calling bioshersen wu13-280/+39
[Why] After call bios table crtc_source_select, dal will program fmt again. The bios table program dig_source_select and other fmt register for bios usage which is redundancy and uncessary. [How] Program dig_soruce_select register directly Signed-off-by: hersen wu <hersenxs.wu@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: 3.2.15Steven Chiu1-1/+1
Signed-off-by: Steven Chiu <steven.chiu@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: take dpms_off into account for edp turn off logicEric Yang1-4/+8
[why] Previously we incorrectly skipped backlight control when stream is present but dpms_off = true. This causes backlight to remain on in the we boot up or resume into a external display only configuration where VBIOS posted on the eDP. [How] Add dpms_off into the condition for edp need to turn off. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25revert "drm/amd/display: Add condition to sync eDP SW status and HW status"Eric Yang6-120/+0
[Why] This change causes regression for S4 resume where gamma is not programmed. The change incorrectly updates the requested dpms_off state. This reverts commit d2b1d6bbc56afab8ebae9d52d7ca0ea3569bd600. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: Adjust ABM 2.2 contrast parametersJosip Pavic1-3/+3
[Why] Improved contrast in ABM 2.2 is desired [How] Increase the contrast factor for ABM levels 2, 3 and 4 Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: Default to linear output gammaKrunoslav Kovac1-33/+40
[Why] Our output TF calculation doesn't work if no user-specified gamma correction. Normally, user provides this, but driver sohuld just assume default (linear) gamma otherwise. [How] Remove output TF dependency on user gamma being provided. Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Acked-by: Sivapiriyan Kumarasamy <Sivapiriyan.Kumarasamy@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: Fix use of uninitialized unionJohn Barberiz1-1/+1
[Why] An uninitialized variable would randomly initialize to a large value. This caused enough delay to fail DP Compliance Test 400.2.1. [How] Initialize the variable. Signed-off-by: John Barberiz <John.Barberiz@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: Create switching mechanism for ABM 2.2Josip Pavic1-165/+418
[Why] Need method of detecting which version of the DMCU FW is loaded and load the appropriate iRAM. [How] Create definition for ABM 2.2 iRAM, and load it if the DMCU FW version number matches the ABM 2.2 version; otherwise load ABM 2.1 iRAM. Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: Update DMCU versioning mechanismJosip Pavic3-11/+10
[Why] Current date based versioning doesn't tell us about feature version and build version, and is not useful for debug. [How] Add versioning based on feature and build Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: Know what a pageflip isDavid Francis1-1/+2
[Why] We were assuming that any commit with allow_modeset == false was a pageflip. This was against drm intention and only worked by sheer luck [How] A pageflip is the change from one framebuffer to another Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: Perform plane updates only when neededDavid Francis1-129/+62
[Why] Our old logic: if pageflip, update freesync and plane address. Otherwise, update everything. This over-updated on non-pageflip cases, and it failed to update if pageflip and non-pageflip changes occurred on the same commit [How] Update flip_addrs on pageflips. Update scaling_info when it changes. Update color fields on color changes. Updates plane_info always because we don't have a good way of knowing when it needs to be updated. Unfortunately, this means that every stream commit involves two calls into DC. In particular, on pageflips there is a second, pointless update that changes nothing but costs several microseconds (about a 50% increase in time taken). The update is fast, but there are comparisons and some useless programming. Leave TODOs indicating dissatisfaction. Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: Call into DC once per multiplane flipDavid Francis1-181/+155
[Why] amdgpu_dm_commit_planes was performing multi-plane flips incorrectly: It waited for vblank once per flipped plane It prepared flip ISR and acquired the corresponding vblank ref once per plane, although it closed ISR and put the ref once per crtc It called into dc once per flipped plane, duplicating some work [How] Wait for vblank, get vblank ref, prepare flip ISR, and call into DC only once, and only if there is a pageflip Make freesync continue to update planes even if vrr information has already been changed Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: Simplify underscan and ABM commitDavid Francis1-18/+31
[Why] Underscan and ABM are connector properties but require updates to DC stream state. Previously, on updates to these properties the affected stream and all its planes were committed. This is unnecessary; only a few fields on the stream need to be changed. [How] If scaling or ABM have changed, change the stream and create a stream update with those changes. Call DC with only those fields. Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: Let updates with no scaling changes be fastDavid Francis1-1/+1
[Why] DC was assuming that any surface_update->scaling_info meant the update was at least medium. However, if nothing has changed there is no scaling to program, so there is no problem with the update being fast [How] If every update flag is not set, the update is fast Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Acked-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: Introduce DC VM interfaceEryk Brol10-10/+254
Virtual memory allows display to support flipping to surfaces which are not allocated contiguously in memory with physical addresses, instead a 1-4 level page table is used. This is beneficial because it allows the scattering of large surfaces to improve memory efficiency and security. Signed-off-by: Eryk Brol <eryk.brol@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: Restructure DCN10 hubbubEryk Brol4-64/+88
[Why] Change DCN10 hubbub to use hubbub as a base and allow all future DCN hubbubs to do the same instead of using DCN10_hubbub. This increases readability and doesn't require future hubbubs to inherit anything other than the base hubbub struct. [How] Create separate DCN10_hubbub struct which uses the hubbub struct as a base. Signed-off-by: Eryk Brol <eryk.brol@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: fix eDP fast bootup for pre-raven asichersen wu6-2/+10
[Why] For fastboot, Bios will light up eDP before SW driver is loaded. SW driver will check if eDP is lit by bios through reading the BIOS_SCRATCH_3 register. If lit, SW driver will not power down eDP power and phy to save time. Definition of BIOS_SCRATCH_3 are missing for pre-raven asic. This causes eDP fast boot to not work property. For some eDP panels, even if dp tx sends NoVideoStream_flag =1 and dpcd 0x600=2, eDP rx may not handle properly. This may cause a short flash on screen. [How] Add definition of BIOS_SCRATCH_3 for all asic Signed-off-by: hersen wu <hersenxs.wu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Acked-by: Yongqiang Sun <yongqiang.sun@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: change the max clock level to 16Evan Quan1-1/+1
As the gfxclk for SMU11 can have at most 16 discrete levels. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amdgpu: Replace kzalloc with kcallocGustavo A. R. Silva1-2/+5
Replace kzalloc() function with its 2-factor argument form, kcalloc(). This patch replaces cases of: kzalloc(a * b, gfp) with: kcalloc(a, b, gfp) Also, improve the coding style and the use of sizeof during allocation by changing sizeof(struct dc_surface_update) and sizeof(struct dc_plane_state) to sizeof(*updates) and sizeof(*surfaces), correspondingly. This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: Include names of all PP clock typesRafał Miłecki1-1/+9
This fixes printing clock names in cases like: [ 5.352311] [drm] DM_PPLIB: values for Invalid clock [ 5.352313] [drm] DM_PPLIB: 400000 in kHz [ 5.352313] [drm] DM_PPLIB: 933000 in kHz [ 5.352314] [drm] DM_PPLIB: 1067000 in kHz [ 5.352315] [drm] DM_PPLIB: 1200000 in kHz [ 5.352317] [drm] DM_PPLIB: values for Invalid clock [ 5.352318] [drm] DM_PPLIB: 300000 in kHz [ 5.352318] [drm] DM_PPLIB: 600000 in kHz [ 5.352319] [drm] DM_PPLIB: 626000 in kHz [ 5.352320] [drm] DM_PPLIB: 654000 in kHz (source: HP EliteBook 745 G5 w. RAVEN 0x1002:0x15DD 0x103C:0x83D5 0xD1) On my system above "Invalid" names got replaced by "F" and "DCF". The same problem was occurring on Huawei Matebook D with just 667000 kHz instead of 400000 kHz. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25drm/amd/display: Skip create new stream if crtc state doesn't changeJerry (Fangzhi) Zuo1-0/+4
Need to check if crtc state is changed so that mode set is required before trying to create new stream. It deals with the MST hotplug use case when plug back to the same connector where the failure to create new stream for the inactive crtc on the old connector. Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-24drm: Split out drm_probe_helper.hDaniel Vetter3-3/+3
Having the probe helper stuff (which pretty much everyone needs) in the drm_crtc_helper.h file (which atomic drivers should never need) is confusing. Split them out. To make sure I actually achieved the goal here I went through all drivers. And indeed, all atomic drivers are now free of drm_crtc_helper.h includes. v2: Make it compile. There was so much compile fail on arm drivers that I figured I'll better not include any of the acks on v1. v3: Massive rebase because i915 has lost a lot of drmP.h includes, but not all: Through drm_crtc_helper.h > drm_modeset_helper.h -> drmP.h there was still one, which this patch largely removes. Which means rolling out lots more includes all over. This will also conflict with ongoing drmP.h cleanup by others I expect. v3: Rebase on top of atomic bochs. v4: Review from Laurent for bridge/rcar/omap/shmob/core bits: - (re)move some of the added includes, use the better include files in other places (all suggested from Laurent adopted unchanged). - sort alphabetically v5: Actually try to sort them, and while at it, sort all the ones I touch. v6: Rebase onto i915 changes. v7: Rebase once more. Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Acked-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Acked-by: CK Hu <ck.hu@mediatek.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: linux-arm-kernel@lists.infradead.org Cc: virtualization@lists.linux-foundation.org Cc: etnaviv@lists.freedesktop.org Cc: linux-samsung-soc@vger.kernel.org Cc: intel-gfx@lists.freedesktop.org Cc: linux-mediatek@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Cc: nouveau@lists.freedesktop.org Cc: spice-devel@lists.freedesktop.org Cc: amd-gfx@lists.freedesktop.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-tegra@vger.kernel.org Cc: xen-devel@lists.xen.org Link: https://patchwork.freedesktop.org/patch/msgid/20190117210334.13234-1-daniel.vetter@ffwll.ch
2019-01-16drm/amd/display: Detach backlight from streamDavid Francis4-15/+3
[Why] Backlight is conceptually a property of links, not streams. All backlight programming is done on links, but there is a stream property bl_pwm_level that is used to restore backlight on dpms on and s3 resume. This is unnecessary, as backlight is already restored by hardware with no driver intervention. [How] Remove bl_pwm_level, and the stream argument to set_backlight Bug: https://bugs.freedesktop.org/show_bug.cgi?id=109375 Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 923fe4951282cbdfce05186c10380bbc45b5e03b)
2019-01-14drm/amd/display: Fix disabled cursor on top screen edgeNicholas Kazlauskas2-2/+2
[Why] The cursor vanishes when touching the top of edge of the screen for Raven on Linux. This occurs because the cursor height is not taken into account when deciding to disable the cursor. [How] Factor in the cursor height into the cursor calculations - and mimic the existing x position calculations. Fixes: 94a4ffd1d40b ("drm/amd/display: fix PIP bugs on Dal3") Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14drm/amd/display: fix warning on raven hotplugRoman Li1-13/+6
[Why] Hotplug on raven results in REG_WAIT_TIMEOUT warning due to failing attempt to lock disabled otg for the hubp interdependent pipes programming. [How] Don't setup pipe interdependencies for disabled otg. Also removed the unnecessary duplicate logic checks. Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14drm/amd/display: fix PME notification not working in RV desktopCharlene Liu1-1/+6
[Why] PPLIB not receive the PME when unplug. Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Chris Park <Chris.Park@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14drm/amd/display: Only get the connector state for VRR when toggledNicholas Kazlauskas1-1/+1
[Why] This fixes a stuttering issue that occurs when moving a hardware cursor when VRR is enabled. Previously when VRR is enabled atomic check will grab the connector state for every atomic update. This has to lock the connector in order to do so. The locking is bad enough by itself for performance, but it gets worse with what we do just below that - add all the planes for the CRTC to the commit. This prevents the cursor fast path from working - there's more than one plane now. With state->allow_modeset = true on top of this, it also adds and removes all the planes from the DC context triggering a full (very slow) update in DC. [How] We need the connector state to get the VRR min/max capbilities, but we only need them when there's a CRTC mode change or when VRR is toggled. The condition has been updated accordingly. Fixes: 3cc22f281318 ("drm/amdgpu: Set FreeSync state using drm VRR properties") Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14drm/amd/display: Pack DMCU iRAM alignmentJosip Pavic1-0/+2
[Why] When the DMCU's iRAM definition was moved to the newly created power_helpers, a #pragma pack was lost, causing the iRAM to be misaligned [How] Restore the #pragma pack Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-03 12:28:51 +0000