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2021-01-15Merge tag 'amd-drm-next-5.12-2021-01-08' of ↵Dave Airlie31-114/+169
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-5.12-2021-01-08: amdgpu: - Rework IH ring handling on vega and navi - Rework HDP handling for vega and navi - swSMU documenation updates - Overdrive support for Sienna Cichlid and newer asics - swSMU updates for vangogh - swSMU updates for renoir - Enable FP16 on DCE8-11 - Misc code cleanups and bug fixes radeon: - Fixes for platforms that can't access PCI resources correctly - Misc code cleanups From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210108221811.3868-1-alexander.deucher@amd.com Signed-off-by: Dave Airlie <airlied@redhat.com>
2021-01-08drm/amdgpu/display: fix build with CONFIG_DRM_AMD_DC_DCN disabledAlex Deucher1-0/+2
dc_allow_idle_optimizations() needs to be protected by CONFIG_DRM_AMD_DC_DCN. Fixes: 71338cb4a7c2 ("drm/amd/display: enable idle optimizations for linux (MALL stutter)") Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-07Merge tag 'drm-misc-next-2020-12-17' of ↵Daniel Vetter1-1/+0
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v5.12: UAPI Changes: - Not necessarily one, but we document that userspace needs to force probe connectors. Cross-subsystem Changes: - Require FB_ATY_CT for aty on sparc64. - video: Fix documentation, and a few compiler warnings. - Add devicetree bindings for DP connectors. - dma-buf: Update kernel-doc, and add might_lock for resv objects in begin/end_cpu_access. Core Changes: - ttm: Warn when releasing a pinned bo. - ttm: Cleanup bo size handling. - cma-helper: Remove prime infix, and implement mmap as GEM CMA functions. - Split drm_prime_sg_to_page_addr_arrays into 2 functions. - Add a new api to install irq using devm. - Update panel kerneldoc to inline style. - Add DP support to drm/bridge. - Assorted small fixes to ttm, fb-helper, scheduler. - Add atomic_commit_setup function callback. - Automatically use the atomic gamma_set, instead of forcing drivers to declare the default atomic version. - Allow using degamma for legacy gamma if gamma is not available. - Clarify that primary/cursor planes are not tied to 1 crtc (depending on possible_crtcs). - ttm: Cleanup the lru handler. Driver Changes: - Add pm support to ingenic. - Assorted small fixes in radeon, via, rockchip, omap2fb, kmb, gma500, nouveau, virtio, hisilicon, ingenic, s6e63m0 panel, ast, udlfb. - Add BOE NV110WTM-N61, ys57pss36bh5gq, Khadas TS050 panels. - Stop using pages with drm_prime_sg_to_page_addr_arrays, and switch all callers to use ttm_sg_tt_init. - Cleanup compiler and docbook warnings in a lot of fbdev devices. - Use the drmm_vram_helper in hisilicon. - Add support for BCM2711 DSI1 in vc4. - Add support for 8-bit delta RGB panels to ingenic. - Add documentation on how to test vkms. - Convert vc4 to atomic helpers. - Use degamma instead of gamma table in omap, to add support for CTM and color encoding/range properties. - Rework omap DSI code, and merge all omapdrm modules now that the last omap panel is now a drm panel. - More refactoring of omap dsi code. - Enable 10/12 bpc outputs in vc4. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/78381a4f-45fd-aed4-174a-94ba051edd37@linux.intel.com
2021-01-06Revert "drm/amd/display: Fix memory leaks in S3 resume"Alex Deucher1-2/+1
This reverts commit a135a1b4c4db1f3b8cbed9676a40ede39feb3362. This leads to blank screens on some boards after replugging a display. Revert until we understand the root cause and can fix both the leak and the blank screen after replug. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=211033 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1427 Cc: Stylon Wang <stylon.wang@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Cc: Andre Tomt <andre@tomt.net> Cc: Oleksandr Natalenko <oleksandr@natalenko.name> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2021-01-05drm/amdgpu/display: drop DCN support for aarch64Alex Deucher13-73/+1
From Ard: "Simply disabling -mgeneral-regs-only left and right is risky, given that the standard AArch64 ABI permits the use of FP/SIMD registers anywhere, and GCC is known to use SIMD registers for spilling, and may invent other uses of the FP/SIMD register file that have nothing to do with the floating point code in question. Note that putting kernel_neon_begin() and kernel_neon_end() around the code that does use FP is not sufficient here, the problem is in all the other code that may be emitted with references to SIMD registers in it. So the only way to do this properly is to put all floating point code in a separate compilation unit, and only compile that unit with -mgeneral-regs-only." Disable support until the code can be properly refactored to support this properly on aarch64. Acked-by: Will Deacon <will@kernel.org> Reported-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: Enable fp16 also on DCE-8/10/11.Mario Kleiner3-3/+3
The hw supports fp16, this is not only useful for HDR, but also for standard dynamic range displays, because it allows to get more precise color reproduction with about 11 - 12 bpc linear precision in the unorm range 0.0 - 1.0. Working fp16 scanout+display (and HDR over HDMI) was verified on a DCE-8 asic, so i assume that the more recent DCE-10/11 will work equally well, now that format-specific plane scaling constraints are properly enforced, e.g., the inability of fp16 to scale on older hw like DCE-8 to DCE-11. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: Check plane scaling against format specific hw plane caps.Mario Kleiner1-8/+73
This takes hw constraints specific to pixel formats into account, e.g., the inability of older hw to scale fp16 format framebuffers. It should now allow safely to enable fp16 formats also on DCE-8, DCE-10, DCE-11.0 Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: Create and Destroy PSR resources for DCN302Joshua Aberback1-0/+13
We need these to support PSR on DCN302 Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: enable idle optimizations for linux (MALL stutter)Bhawanpreet Lakha2-1/+27
[Why] We can only use this feature when the display is idle. When active vblank irq count is 0 we know all the displays are idle. [How] -Add a active vblank irq counter -Update the counter when we enable/disable vblank irq -if vblank irq count is 0 we can consider mall stutter Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Nick Kazlauskas <Nicholas.Kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: Update idle optimization handlingJoshua Aberback8-2/+31
[How] - use dc interface instead of hwss interface in cursor functions, to keep dc->idle_optimizations_allowed updated - add dc interface to check if idle optimizations might apply to a plane Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: Fix unused variable warningArnd Bergmann2-4/+2
Some of the newly added code is hidden inside of #ifdef blocks, but one variable is unused when debugfs is disabled: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:8370:8: error: unused variable 'configure_crc' [-Werror,-Wunused-variable] Change the #ifdef to an if(IS_ENABLED()) check to fix the warning and avoid adding more #ifdefs. Fixes: c920888c604d ("drm/amd/display: Expose new CRC window property") Reviewed-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: fix comparison pointer to bool warning in dc.cTian Tao1-2/+2
Fixes coccicheck warning: drivers/gpu/drm/amd/display/dc/core/dc.c:1543:12-19: WARNING: Comparison to bool drivers/gpu/drm/amd/display/dc/core/dc.c:1496:14-42: WARNING: Comparison to bool drivers/gpu/drm/amd/display/dc/core/dc.c:971:15-48: WARNING: Comparison to bool drivers/gpu/drm/amd/display/dc/core/dc.c:976:15-44: WARNING: Comparison to bool Signed-off-by: Tian Tao <tiantao6@hisilicon.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: remove useless else ifTian Tao1-2/+0
Fix the following coccinelle report: drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c:1357:6-8: WARNING: possible condition with no effect (if == else) Signed-off-by: Tian Tao <tiantao6@hisilicon.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: remove unused including <linux/version.h>Tian Tao3-3/+0
Remove including <linux/version.h> that don't need it. Signed-off-by: Tian Tao <tiantao6@hisilicon.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: fix sysfs amdgpu_current_backlight_pwm NULL pointer issueKevin Wang1-1/+6
fix NULL pointer issue when read sysfs amdgpu_current_backlight_pwm sysfs node. Call Trace: [ 248.273833] BUG: kernel NULL pointer dereference, address: 0000000000000130 [ 248.273930] #PF: supervisor read access in kernel mode [ 248.273993] #PF: error_code(0x0000) - not-present page [ 248.274054] PGD 0 P4D 0 [ 248.274092] Oops: 0000 [#1] SMP PTI [ 248.274138] CPU: 2 PID: 1377 Comm: cat Tainted: G OE 5.9.0-rc5-drm-next-5.9+ #1 [ 248.274233] Hardware name: System manufacturer System Product Name/Z170-A, BIOS 3802 03/15/2018 [ 248.274641] RIP: 0010:dc_link_get_backlight_level+0x5/0x70 [amdgpu] [ 248.274718] Code: 67 ff ff ff 41 b9 03 00 00 00 e9 45 ff ff ff d1 ea e9 55 ff ff ff 0f 1f 44 00 00 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 44 00 00 <48> 8b 87 30 01 00 00 48 8b 00 48 8b 88 88 03 00 00 48 8d 81 e8 01 [ 248.274919] RSP: 0018:ffffb5ad809b3df0 EFLAGS: 00010203 [ 248.274982] RAX: ffffa0f77d1c0010 RBX: ffffa0f793ae9168 RCX: 0000000000000001 [ 248.275064] RDX: ffffa0f79753db00 RSI: 0000000000000001 RDI: 0000000000000000 [ 248.275145] RBP: ffffb5ad809b3e00 R08: ffffb5ad809b3da0 R09: 0000000000000000 [ 248.275225] R10: ffffb5ad809b3e68 R11: 0000000000000000 R12: ffffa0f793ae9190 [ 248.275306] R13: ffffb5ad809b3ef0 R14: 0000000000000001 R15: ffffa0f793ae9168 [ 248.275388] FS: 00007f5f1ec4d540(0000) GS:ffffa0f79ec80000(0000) knlGS:0000000000000000 [ 248.275480] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 248.275547] CR2: 0000000000000130 CR3: 000000042a03c005 CR4: 00000000003706e0 [ 248.275628] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 248.275708] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 248.275789] Call Trace: [ 248.276124] ? current_backlight_read+0x24/0x40 [amdgpu] [ 248.276194] seq_read+0xc3/0x3f0 [ 248.276240] full_proxy_read+0x5c/0x90 [ 248.276290] vfs_read+0xa7/0x190 [ 248.276334] ksys_read+0xa7/0xe0 [ 248.276379] __x64_sys_read+0x1a/0x20 [ 248.276429] do_syscall_64+0x37/0x80 [ 248.276477] entry_SYSCALL_64_after_hwframe+0x44/0xa9 [ 248.276538] RIP: 0033:0x7f5f1e75c191 [ 248.276585] Code: fe ff ff 48 8d 3d b7 9d 0a 00 48 83 ec 08 e8 46 4d 02 00 66 0f 1f 44 00 00 48 8d 05 71 07 2e 00 8b 00 85 c0 75 13 31 c0 0f 05 <48> 3d 00 f0 ff ff 77 57 f3 c3 0f 1f 44 00 00 41 54 55 49 89 d4 53Hw [ 248.276784] RSP: 002b:00007ffcb1fc3f38 EFLAGS: 00000246 ORIG_RAX: 0000000000000000 [ 248.276872] RAX: ffffffffffffffda RBX: 0000000000020000 RCX: 00007f5f1e75c191 [ 248.276953] RDX: 0000000000020000 RSI: 00007f5f1ec2b000 RDI: 0000000000000003 [ 248.277034] RBP: 0000000000020000 R08: 00000000ffffffff R09: 0000000000000000 [ 248.277115] R10: 0000000000000022 R11: 0000000000000246 R12: 00007f5f1ec2b000 [ 248.277195] R13: 0000000000000003 R14: 00007f5f1ec2b00f R15: 0000000000020000 [ 248.277279] Modules linked in: amdgpu(OE) iommu_v2 gpu_sched ttm(OE) drm_kms_helper cec drm i2c_algo_bit fb_sys_fops syscopyarea sysfillrect sysimgblt rpcsec_gss_krb5 auth_rpcgss nfsv4 nfs lockd grace fscache nls_iso8859_1 snd_hda_codec_realtek snd_hda_codec_hdmi snd_hda_codec_generic ledtrig_audio intel_rapl_msr intel_rapl_common snd_hda_intel snd_intel_dspcfg x86_pkg_temp_thermal intel_powerclamp snd_hda_codec snd_hda_core snd_hwdep snd_pcm snd_seq_midi snd_seq_midi_event mei_hdcp coretemp snd_rawmidi snd_seq kvm_intel kvm snd_seq_device snd_timer irqbypass joydev snd input_leds soundcore crct10dif_pclmul crc32_pclmul ghash_clmulni_intel aesni_intel crypto_simd cryptd glue_helper rapl intel_cstate mac_hid mei_me serio_raw mei eeepc_wmi wmi_bmof asus_wmi mxm_wmi intel_wmi_thunderbolt acpi_pad sparse_keymap efi_pstore sch_fq_codel parport_pc ppdev lp parport sunrpc ip_tables x_tables autofs4 hid_logitech_hidpp hid_logitech_dj hid_generic usbhid hid e1000e psmouse ahci libahci wmi video [ 248.278211] CR2: 0000000000000130 [ 248.278221] ---[ end trace 1fbe72fe6f91091d ]--- [ 248.357226] RIP: 0010:dc_link_get_backlight_level+0x5/0x70 [amdgpu] [ 248.357272] Code: 67 ff ff ff 41 b9 03 00 00 00 e9 45 ff ff ff d1 ea e9 55 ff ff ff 0f 1f 44 00 00 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 44 00 00 <48> 8b 87 30 01 00 00 48 8b 00 48 8b 88 88 03 00 00 48 8d 81 e8 01 Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-25drm/amd/display: avoid uninitialized variable warningLinus Torvalds1-1/+1
clang (quite rightly) complains fairly loudly about the newly added mpc1_get_mpc_out_mux() function returning an uninitialized value if the 'opp_id' checks don't pass. This may not happen in practice, but the code really shouldn't return garbage if the sanity checks don't pass. So just initialize 'val' to zero to avoid the issue. Fixes: 110b055b2827 ("drm/amd/display: add getter routine to retrieve mpcc mux") Cc: Josip Pavic <Josip.Pavic@amd.com> Cc: Bindu Ramamurthy <bindu.r@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-12-24Merge tag 'amd-drm-fixes-5.11-2020-12-23' of ↵Dave Airlie24-81/+120
git://people.freedesktop.org/~agd5f/linux into drm-next amd-drm-fixes-5.11-2020-12-23: amdgpu: - Vangogh SMU fixes - Arcturus gfx9 fixes - Misc display fixes - Sienna Cichlid SMU update - Fix S3 display memory leak - Fix regression caused by DP sub-connector support amdkfd: - Properly require pcie atomics for gfx10 Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201223204752.4019-1-alexander.deucher@amd.com
2020-12-23drm/amd/display: Use common error handling code in dc_create()Markus Elfring1-9/+6
Adjust a jump target so that a bit of exception handling can be better reused at the end of this function. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-23drm/amd/display: Return directly after a failed kzalloc() in dc_create()Markus Elfring1-4/+2
* Return directly after a call of the function “kzalloc” failed at the beginning. * Delete a label which became unnecessary with this refactoring. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-23drm/amd/display: Fix memory leaks in S3 resumeStylon Wang1-1/+2
EDID parsing in S3 resume pushes new display modes to probed_modes list but doesn't consolidate to actual mode list. This creates a race condition when amdgpu_dm_connector_ddc_get_modes() re-initializes the list head without walking the list and results in memory leak. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=209987 Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2020-12-23drm/amd/display: add getter routine to retrieve mpcc muxJosip Pavic5-0/+19
[Why & How] Add function to identify which MPCC is providing input to a specified OPP Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-23drm/amd/display: always program DPPDTO unless not safe to lowerJake Wang1-6/+5
[Why] We defer clock updates to after pipes have been programmed. In some instances we use DPPCLK that have been previously set to be "unused". This results in a brief window of time where underflow could occur. [How] During prepare bandwidth allow rn_update_clocks_update_dpp_dto to check each instance and compare previous clock to new clock. If new clock is higher than previous clock, program DPPDTO. Signed-off-by: Jake Wang <haonan.wang2@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-23drm/amd/display: [FW Promotion] Release 0.0.47Yongqiang Sun1-2/+2
- restore lvtma_pwrseq_delay2 from vbios integrated info table - restore MVID/NVID after power up. - Enable timer wake up mask when enable timer interrupt. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-23drm/amd/display: updated wm table for RenoirJake Wang1-8/+8
[Why] For certain timings, Renoir may underflow due to sr exit latency being too slow. [How] Updated wm table for renoir. Signed-off-by: Jake Wang <haonan.wang2@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-23drm/amd/display: Acquire DSC during split stream for ODM only if top_pipeSung Lee1-1/+1
[WHY] DSC should only be acquired per OPP. Therefore, DSC should only be acquired for the top_pipe when ODM is enabled. Not doing this check may lead to acquiring more DSC's than needed when doing MPO + ODM Combine. [HOW] Only acquire DSC if pipe is top_pipe. Signed-off-by: Sung Lee <sung.lee@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-23drm/amd/display: Multi-display underflow observedAric Cyr2-23/+9
[Why] FP2 programming not happening when topology changes occur with multiple displays. [How] Ensure FP2 is programmed whenever global sync changes occur but wait for VACTIVE first to avoid underflow. Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-23drm/amd/display: Remove unnecessary NULL checkEryk Brol1-1/+1
[Why] new_crtc_state is already dereferenced earlier in the function [How] Remove the check Signed-off-by: Eryk Brol <eryk.brol@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-23drm/amd/display: Update RN/VGH active display count workaroundMichael Strauss2-16/+2
[WHY] Virtual signals were previously counted as a workaround to S0i2 hang which is fixed on Renoir. This blocks S0i3 diags testing. [HOW] Stop counting virtual signals as S0i2 hang is fixed on Renoir. Signed-off-by: Michael Strauss <michael.strauss@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-23drm/amd/display: change SMU repsonse timeout to 2s.Yongqiang Sun1-1/+1
[Why] there is some garbage showing up during reboot test. Reason: SMU might handle display driver msg defered and driver will send next msg to SMU after 10ms timeout, once SMU FW handle previous msg, parameters are changed to next one, which result in a wrong value be programmed. [How] Extend timeout to 2s so SMU will have enough time to handle driver msg. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-23drm/amd/display: gradually ramp ABM intensityRizvi2-10/+26
[Why] Need driver to pass values of backlight ramp start and ramp reduction so that intensity can be ramped down appropriately. [How] Using abm_parameters structure to get these values from driver. Signed-off-by: Rizvi <syerizvi@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-23drm/amd/display: To modify the condition in indicating branch deviceMartin Tsai1-7/+1
[why] The sink count change HPD_IRQ will be ignored if the branch device has only DP DFP. [how] To remove the port type restriction. Signed-off-by: Martin Tsai <martin.tsai@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-23drm/amd/display: Modify the hdcp device count check conditionMartin Tsai2-4/+11
[why] Some MST display may not report the internal panel to DEVICE_COUNT, that makes the check condition always failed. [how] To update this condition with the reported device count + 1 (because the immediate repeater's internal panel is possibly not included in DEVICE_COUNT) Signed-off-by: Martin Tsai <martin.tsai@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-23drm/amd/display: Interfaces for hubp blank and soft resetWesley Chalmers5-0/+28
[WHY] HUBP blanking sequence on DCN30 requires us to check if HUBP is in blank and also toggle HUBP_DISABLE, which should instead be called HUBP_SOFT_RESET for what it does in HW. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-23drm/amd/display: handler not correctly checked at remove_irq_handlerQingqing Zhuo1-1/+4
[why] handler is supposedly passed in as a function pointer; however, the entire struct amdgpu_dm_irq_handler_data gets from the list is used to check match. [how] use the interrupt_handler within amdgpu_dm_irq_handler_data for checking match. Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-16Merge tag 'amd-drm-fixes-5.11-2020-12-16' of ↵Daniel Vetter25-105/+202
git://people.freedesktop.org/~agd5f/linux into drm-next amd-drm-fixes-5.11-2020-12-16: amdgpu: - Fix a eDP regression for DCE asics - SMU fixes for sienna cichlid - Misc W=1 fixes - SDMA 5.2 reset fix - Suspend/resume fix - Misc display fixes - Misc runtime PM fixes and cleanups - Dimgrey Cavefish fixes - printk cleanup - Documentation warning fixes amdkfd: - Error logging fix - Fix pipe offset calculation radeon: - printk cleanup Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201216192421.18627-1-alexander.deucher@amd.com
2020-12-16drm/amdgpu/disply: fix documentation warnings in display managerAlex Deucher1-1/+20
Add documentation for crc window. Fixes: c920888c604d ("drm/amd/display: Expose new CRC window property") Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Wayne Lin <Wayne.Lin@amd.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reviewed-by: Wayne Lin <Wayne.Lin@amd.com>
2020-12-16drm/amd/display: Add get_dig_frontend implementation for DCExRodrigo Siqueira2-1/+43
Some old ASICs might not implement/require get_dig_frontend helper; in this scenario, we can have a NULL pointer exception when we try to call it inside vbios disable operation. For example, this situation might happen when using Polaris12 with an eDP panel. This commit avoids this situation by adding a specific get_dig_frontend implementation for DCEx. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Harry Wentland <Harry.Wentland@amd.com> Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Cc: Chiawen Huang <chiawen.huang@amd.com> Reported-and-tested-by: Borislav Petkov <bp@suse.de> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2020-12-15drm/amd/display: Adding prototype for dccg21_update_dpp_dto()Souptick Joarder1-0/+1
Kernel test robot throws below warning -> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_dccg.c:46:6: warning: no previous prototype for 'dccg21_update_dpp_dto' [-Wmissing-prototypes] Adding prototype for dccg21_update_dpp_dto(). Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: Fixed kernel test robot warningSouptick Joarder1-2/+2
Kernel test robot throws below warning -> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5349:5: warning: no previous prototype for 'amdgpu_dm_crtc_atomic_set_property' [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5349:5: warning: no previous prototype for function 'amdgpu_dm_crtc_atomic_set_property' [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5373:5: warning: no previous prototype for 'amdgpu_dm_crtc_atomic_get_property' [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5373:5: warning: no previous prototype for function 'amdgpu_dm_crtc_atomic_get_property' [-Wmissing-prototypes] As these functions are only used inside amdgpu_dm.c, these can be made static. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: 3.2.116Aric Cyr1-1/+1
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: [FW Promotion] Release 0.0.46Anthony Koo1-25/+37
- Add new aux_channel_type - Changed port_index to instance in dmub_cmd_dp_aux_control_data - Change aux_return_code_type to sync up with driver - param for ramping abm based on backlight level Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: Fix cleanup typo in MPCC visual confirmAric Cyr1-10/+7
[Why] Typo in MPCC visual confirmation. [How] Fix to correct values. Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: Fix OGAM LUT calculation precisionFelipe1-5/+17
[Why] The OGAM LUT precision was accumulating too much error in the higher end. [How] Instead of calculating all points of the LUT in relation to the previous ones, perform a full calculation in one of the intermediate segments to stop error propagation. Signed-off-by: Felipe Clark <Felipe.Clark@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: Only update FP2 for full updatesAric Cyr2-11/+20
[Why] FP2 is not double buffered and must wait for VACTIVE before programming. [How] Only update when there is a full update we should change FP2 to avoid delay every flip. Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: updated wm table for RenoirJake Wang1-6/+6
[Why] For certain timings, Renoir may underflow due to sr exit latency being too slow. [How] Updated wm table for renoir. Signed-off-by: Jake Wang <haonan.wang2@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: delay fp2 programming until vactive before lockMartin Leung5-18/+24
[Why] race condition of programming FP2 wrt pipe locking and vactive state can cause underflow/black screen [How] Enforce the FP2 is only programmed during vactive, and unlock pipe soon afterwards. Signed-off-by: Martin Leung <martin.leung@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: Add DP info frame update for dcn30Leo (Hanghong) Ma1-1/+1
[Why] We are missing the DP info frame update on dcn30, and this will lead to DP SDPs not being sent; [How] Add the DP info frame update for dcn30; Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: add dcn30_link_encoder_validate_output_with_stream to headerEric Bernstein3-2/+6
[Why] dcn30_link_encoder_validate_output_with_stream was a static function. [How] remove the static define and include it in the header. Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: Fix to be able to stop crc calculationWayne Lin1-1/+12
[Why] Find out when we try to disable CRC calculation, crc generation is still enabled. Main reason is that dc_stream_configure_crc() will never get called when the source is AMDGPU_DM_PIPE_CRC_SOURCE_NONE. [How] Add checking condition that when source is AMDGPU_DM_PIPE_CRC_SOURCE_NONE, we should also call dc_stream_configure_crc() to disable crc calculation. Also, clean up crc window when disable crc calculation. Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: HP Reverb G2 VR fails to light upAric Cyr3-3/+3
[Why] Many VR headsets require a HSYNC width of 4, but DCN has default minimum of 8. [How] Change the arbitrary minimum HSYNC width to 4 to match DCN20. Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-06-09 21:27:08 +0000