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path: root/drivers/gpu/drm/amd/display/dc/inc
AgeCommit message (Expand)AuthorFilesLines
2021-07-21drm/amd/display: Line Buffer changesNevenko Stupar1-0/+3
2021-07-21drm/amd/display: implement workaround for riommu related hangEric Yang1-0/+1
2021-06-22drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCNAlex Deucher8-31/+5
2021-06-15drm/amd/display: Add interface to get Calibrated Avg Level from FIFOWesley Chalmers1-0/+3
2021-06-15drm/amd/display: Enforce DPCD Address rangesWesley Chalmers2-14/+18
2021-06-15drm/amd/display: Read LTTPR caps first on bootupWesley Chalmers1-0/+1
2021-06-15drm/amd/display: dp mst detection code refactorWenjing Liu1-1/+9
2021-06-08drm/amd/display: Add swizzle visual confirm modePo-Ting Chen1-1/+3
2021-06-08drm/amd/display: Add interface for ADD & DROP PIXEL RegistersWesley Chalmers1-0/+4
2021-06-08drm/amd/display: Add Interface to set FIFO ERRDET SW OverrideWesley Chalmers1-0/+2
2021-06-08drm/amd/display: Return last used DRR VTOTAL from DCJayendran Ramani1-0/+1
2021-06-08drm/amd/display: Expand DP module equalization API.Jimmy Kizito1-0/+8
2021-06-08drm/amd/display: Refactor visual confirmWyatt Wood3-5/+19
2021-06-04drm/amd/display: Add DCN3.1 HWSEQNicholas Kazlauskas1-0/+4
2021-06-04drm/amd/display: Add DCN3.1 DCHHUBNicholas Kazlauskas3-0/+19
2021-06-04drm/amd/display: Add DCN3.1 OPTCNicholas Kazlauskas1-0/+4
2021-06-04drm/amd/display: Add DCN3.1 DIONicholas Kazlauskas1-0/+14
2021-06-04drm/amd/display: Add DCN3.1 DCCGNicholas Kazlauskas1-0/+56
2021-06-04drm/amd/display: Add DCN3.1 clock manager supportNicholas Kazlauskas1-0/+3
2021-05-27Revert "drm/amd/display: Refactor and add visual confirm for HW Flip Queue"Qingqing Zhuo2-7/+0
2021-05-27drm/amd/display: fix odm scalingDmytro Laktyushkin1-4/+0
2021-05-27drm/amd/display: Expand DP module clock recovery API.Jimmy Kizito1-0/+49
2021-05-27drm/amd/display: Update DP link configuration.Jimmy Kizito1-1/+16
2021-05-27drm/amd/display: Added support for individual control for multiple back-light...Jake Wang1-1/+2
2021-05-21drm/amd/display: take dc_lock in short pulse handler onlyAurabindo Pillai1-0/+4
2021-05-19drm/amd/display: Refactor and add visual confirm for HW Flip QueueWyatt Wood2-0/+7
2021-05-19drm/amd/display: determine dp link encoding format from link settingsWenjing Liu1-0/+1
2021-05-19drm/amd/display: Document set RECOUT operationRodrigo Siqueira1-0/+6
2021-05-10drm/amd/display: Expand DP module training API.Jimmy Kizito1-0/+7
2021-05-10drm/amd/display: Add fallback and abort paths for DP link training.Jimmy Kizito1-1/+2
2021-05-10drm/amd/display: Update setting of DP training parameters.Jimmy Kizito1-1/+6
2021-05-10drm/amd/display: Add audio support for DFP type of active branch is DP caseDale Zhao1-0/+2
2021-05-10drm/amd/display: add dsc stream overhead for dp onlyWenjing Liu1-0/+1
2021-04-15drm/amd/display: Remove static property from decide_edp_link_settingsMichael Strauss1-0/+4
2021-04-15drm/amd/display: Fix DSC enable sequenceMike Hsieh1-0/+2
2021-04-15drm/amd/display: Disable boot optimizations if ILR optimzation is requiredMichael Strauss1-0/+2
2021-04-09drm/amd/display: Add function and debugfs to dump DCC_EN bitVictor Lu1-0/+2
2021-04-09drm/amd/display: Disable MALL when SMU not presentChris Park1-0/+3
2021-04-09drm/amd/display: Set max TTU on DPG enableWesley Chalmers1-0/+1
2021-04-09drm/amd/display: Update display endpoint control path.Jimmy Kizito1-0/+18
2021-04-09drm/amd/display: Add dynamic link encoder selection.Jimmy Kizito3-0/+108
2021-04-09drm/amd/display: Change input parameter for set_drrAlvin Lee1-2/+1
2021-04-09drm/amd/display: hide VGH asic specific structsDmytro Laktyushkin1-9/+0
2021-03-23drm/amd/display: fix dcn3+ bw validation soc param update sequenceDmytro Laktyushkin1-0/+2
2021-03-23drm/amd/display: Enable pflip interrupt upon pipe enableQingqing Zhuo1-0/+2
2021-03-05drm/amd/display: Process crc window at DMCUWayne Lin1-0/+21
2021-03-02drm/amd/display: Update link encoder object creationJimmy Kizito3-0/+15
2021-03-02drm/amd/display: Support for DMUB AUXMeenakshikumar Somasundaram2-2/+5
2021-02-22drm/amd/display: Synchronize displays with different timingsVladimir Stempen4-0/+24
2021-02-18drm/amd/display: Old sequence for HUBP blankAurabindo Pillai1-4/+0
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