summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/display/amdgpu_dm
AgeCommit message (Collapse)AuthorFilesLines
2018-11-15drm/amd/display: Support amdgpu "max bpc" connector property (v2)Nicholas Kazlauskas2-0/+17
[Why] Many panels support more than 8bpc but some modes are unavailable while running at greater than 8bpc due to DP/HDMI bandwidth constraints. Support for more than 8bpc was added recently in the driver but it defaults to the maximum supported bpc - locking out these modes. This should be a user configurable option such that the user can select what bpc configuration they would like. [How] This patch adds support for getting and setting the amdgpu driver specific "max bpc" property on the connector. It also adds support for limiting the output bpc based on the property value. The default limitation is the lowest value in the range, 8bpc. This was the old value before the range was uncapped. This patch should be updated/replaced later once common drm support for max bpc lands. Bugzilla: https://bugs.freedesktop.org/108542 Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=201585 Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=200645 Fixes: e03fd3f300f6 ("drm/amd/display: Do not limit color depth to 8bpc") v2: rebase on upstream (Alex) Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-07drm/amd/amdgpu/dm: Fix dm_dp_create_fake_mst_encoder()Lyude Paul1-5/+0
[why] Removing connector reusage from DM to match the rest of the tree ended up revealing an issue that was surprisingly subtle. The original amdgpu code for DC that was submitted appears to have left a chunk in dm_dp_create_fake_mst_encoder() that tries to find a "master encoder", the likes of which isn't actually used or stored anywhere. It does so at the wrong time as well by trying to access parts of the drm_connector from the encoder init before it's actually been initialized. This results in a NULL pointer deref on MST hotplugs: [ 160.696613] BUG: unable to handle kernel NULL pointer dereference at 0000000000000000 [ 160.697234] PGD 0 P4D 0 [ 160.697814] Oops: 0010 [#1] SMP PTI [ 160.698430] CPU: 2 PID: 64 Comm: kworker/2:1 Kdump: loaded Tainted: G O 4.19.0Lyude-Test+ #2 [ 160.699020] Hardware name: HP HP ZBook 15 G4/8275, BIOS P70 Ver. 01.22 05/17/2018 [ 160.699672] Workqueue: events_long drm_dp_mst_link_probe_work [drm_kms_helper] [ 160.700322] RIP: 0010: (null) [ 160.700920] Code: Bad RIP value. [ 160.701541] RSP: 0018:ffffc9000029fc78 EFLAGS: 00010206 [ 160.702183] RAX: 0000000000000000 RBX: ffff8804440ed468 RCX: ffff8804440e9158 [ 160.702778] RDX: 0000000000000000 RSI: ffff8804556c5700 RDI: ffff8804440ed000 [ 160.703408] RBP: ffff880458e21800 R08: 0000000000000002 R09: 000000005fca0a25 [ 160.704002] R10: ffff88045a077a3d R11: ffff88045a077a3c R12: ffff8804440ed000 [ 160.704614] R13: ffff880458e21800 R14: ffff8804440e9000 R15: ffff8804440e9000 [ 160.705260] FS: 0000000000000000(0000) GS:ffff88045f280000(0000) knlGS:0000000000000000 [ 160.705854] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 160.706478] CR2: ffffffffffffffd6 CR3: 000000000200a001 CR4: 00000000003606e0 [ 160.707124] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 160.707724] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 160.708372] Call Trace: [ 160.708998] ? dm_dp_add_mst_connector+0xed/0x1d0 [amdgpu] [ 160.709625] ? drm_dp_add_port+0x2fa/0x470 [drm_kms_helper] [ 160.710284] ? wake_up_q+0x54/0x70 [ 160.710877] ? __mutex_unlock_slowpath.isra.18+0xb3/0x110 [ 160.711512] ? drm_dp_dpcd_access+0xe7/0x110 [drm_kms_helper] [ 160.712161] ? drm_dp_send_link_address+0x155/0x1e0 [drm_kms_helper] [ 160.712762] ? drm_dp_check_and_send_link_address+0xa3/0xd0 [drm_kms_helper] [ 160.713408] ? drm_dp_mst_link_probe_work+0x4b/0x80 [drm_kms_helper] [ 160.714013] ? process_one_work+0x1a1/0x3a0 [ 160.714667] ? worker_thread+0x30/0x380 [ 160.715326] ? wq_update_unbound_numa+0x10/0x10 [ 160.715939] ? kthread+0x112/0x130 [ 160.716591] ? kthread_create_worker_on_cpu+0x70/0x70 [ 160.717262] ? ret_from_fork+0x35/0x40 [ 160.717886] Modules linked in: amdgpu(O) vfat fat snd_hda_codec_generic joydev i915 chash gpu_sched ttm i2c_algo_bit drm_kms_helper snd_hda_codec_hdmi hp_wmi syscopyarea iTCO_wdt sysfillrect sparse_keymap sysimgblt fb_sys_fops snd_hda_intel usbhid wmi_bmof drm snd_hda_codec btusb snd_hda_core intel_rapl btrtl x86_pkg_temp_thermal btbcm btintel coretemp snd_pcm crc32_pclmul bluetooth psmouse snd_timer snd pcspkr i2c_i801 mei_me i2c_core soundcore mei tpm_tis wmi tpm_tis_core hp_accel ecdh_generic lis3lv02d tpm video rfkill acpi_pad input_polldev hp_wireless pcc_cpufreq crc32c_intel serio_raw tg3 xhci_pci xhci_hcd [last unloaded: amdgpu] [ 160.720141] CR2: 0000000000000000 Somehow the connector reusage DM was using for MST connectors managed to paper over this issue entirely; hence why this was never caught until now. [how] Since this code isn't used anywhere and seems useless anyway, we can just drop it entirely. This appears to fix the issue on my HP ZBook with an AMD WX4150. Signed-off-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-07drm/amd/display: Drop reusing drm connector for MSTJerry (Fangzhi) Zuo2-35/+7
[why] It is not safe to keep existing connector while entire topology has been removed. Could lead potential impact to uapi. Entirely unregister all the connectors on the topology, and use a new set of connectors when the topology is plugged back on. [How] Remove the drm connector entirely each time when the corresponding MST topology is gone. When hotunplug a connector (e.g., DP2) 1. Remove connector from userspace. 2. Drop it's reference. When hotplug back on: 1. Detect new topology, and create new connectors. 2. Notify userspace with sysfs hotplug event. 3. Reprobe new connectors, and reassign CRTC from old (e.g., DP2) to new (e.g., DP3) connector. Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-07drm/amd/display: Cleanup MST non-atomic code workaroundJerry (Fangzhi) Zuo3-46/+4
[why] It is not correct to touch aconnector within atomic_check. [How] It was added as workaround before, and no longer needed. Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-06drm/amdgpu/display/dm: handle FBC dc feature parameterAlex Deucher1-0/+3
Set the dc_config properly when the option is enabled. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-06drm/amd/display: Stop leaking planesHarry Wentland1-1/+1
[Why] drm_plane_cleanup does not free the plane. [How] Call drm_primary_helper_destroy which will also free the plane. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-06Revert "drm/amd/display: set backlight level limit to 1"Alex Deucher1-7/+0
This reverts commit 0cafc82fae41531b0162150f9a97f2c74f97118f. This breaks some apps that assume 0 is minimum brightness. Revert for 4.20. This is fixed properly for drm-next/4.21 in: "drm/amd: Don't fail on backlight = 0" However, that patch depends on more extensive changes to the backlight interface which are too invasive for -fixes. Fixes: Bugzilla: https://bugs.freedesktop.org/108668 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-30drm/amd/display: set backlight level limit to 1Guttula, Suresh1-0/+7
This patch will work as workaround for silicon limitation related to PWM dutycycle when the backlight level goes to 0. Actually PWM value is 16 bit value and valid range from 1-65535. when ever user requested to set this PWM value to 0 which is not fall in the range, in VBIOS taken care this by limiting to 1. This patch here will do the same. Either driver or VBIOS can not pass 0 value as it is not a valid range for PWM and it will give a high PWM pulse which is not the intended behaviour as per HW constraints. Signed-off-by: suresh guttula <suresh.guttula@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-24drm/amd/display: Fix Null point error if smu ip was disabledRex Zhu1-5/+11
from AI, SMU Ip is not indispensable to driver and can be disabled by user via module parameter ip_block_mask. so the pp_handle may be NULL. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12drm/amdgpu/display: dm/amdgpu: make dp phy debugfs for eDPhersen wu1-1/+2
[WHY] dp debugfs file does not exist for eDP under /sys/kernel/debug/dri/0/eDP-1. the root is phy debugfs is created for dp connector only. [HOW] for eDP connector, create phy debugfs too. Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-09drm/amd/display: Signal hw_done() after waiting for flip_done()Shirish S1-2/+8
In amdgpu_dm_commit_tail(), wait until flip_done() is signaled before we signal hw_done(). [Why] This is to temporarily address a paging error that occurs when a nonblocking commit contends with another commit, particularly in a mirrored display configuration where at least 2 CRTCs are updated. The error occurs in drm_atomic_helper_wait_for_flip_done(), when we attempt to access the contents of new_crtc_state->commit. Here's the sequence for a mirrored 2 display setup (irrelevant steps left out for clarity): **THREAD 1** | **THREAD 2** | Initialize atomic state for flip | | Queue worker | ... | Do work for flip | | Signal hw_done() on CRTC 1 | Signal hw_done() on CRTC 2 | | Wait for flip_done() on CRTC 1 <---- **PREEMPTED BY THREAD 1** Initialize atomic state for cursor | update (1) | | Do cursor update work on both CRTCs | | Clear atomic state (2) | **DONE** | ... | | Wait for flip_done() on CRTC 2 | *ERROR* | The issue starts with (1). When the atomic state is initialized, the current CRTC states are duplicated to be the new_crtc_states, and referenced to be the old_crtc_states. (The new_crtc_states are to be filled with update data.) Some things to note: * Due to the mirrored configuration, the cursor updates on both CRTCs. * At this point, the pflip IRQ has already been handled, and flip_done signaled on all CRTCs. The cursor commit can therefore continue. * The old_crtc_states used by the cursor update are the **same states** as the new_crtc_states used by the flip worker. At (2), the old_crtc_state is freed (*), and the cursor commit completes. We then context switch back to the flip worker, where we attempt to access the new_crtc_state->commit object. This is problematic, as this state has already been freed. (*) Technically, 'state->crtcs[i].state' is freed, which was made to reference old_crtc_state in drm_atomic_helper_swap_state() [How] By moving hw_done() after wait_for_flip_done(), we're guaranteed that the new_crtc_state (from the flip worker's perspective) still exists. This is because any other commit will be blocked, waiting for the hw_done() signal. Note that both the i915 and imx drivers have this sequence flipped already, masking this problem. Signed-off-by: Shirish S <shirish.s@amd.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-09drm/amd/display: Flatten irq handler data structLeo Li1-23/+14
[Why] There is no reason why the common data needs to be kept separate. [How] Flatten the struct by moving common data into the DM IRQ struct. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-04BackMerge v4.19-rc6 into drm-nextDave Airlie1-5/+134
I have some pulls based on rc6, and I prefer to have an explicit backmerge. Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-09-27drm/amd/display: Fix Edid emulation for linuxBhawanpreet Lakha1-5/+134
[Why] EDID emulation didn't work properly for linux, as we stop programming if nothing is connected physically. [How] We get a flag from DRM when we want to do edid emulation. We check if this flag is true and nothing is connected physically, if so we only program the front end using VIRTUAL_SIGNAL. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26drm/amdgpu: move more defines into amdgpu_irq.hChristian König1-1/+1
Everything that isn't related to the IH ring. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26drm/amd/display: Remove mst_hotplug_workLeo Li2-12/+0
[Why] The work struct's schedule call was removed a while ago, making this useless. [How] Remove it. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26drm/amd/display: Guard against null stream dereference in do flipNicholas Kazlauskas1-1/+14
[Why] During suspend under some hardware configurations can result in a series of atomic commits with a NULL stream status - which causes a NULL pointer dereference. This should be guarded. [How] Exit early from the function - if we can't access the stream then there isn't anything that can be done here. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26drm/amd/display: Add color bit info to freesync infoframeSivapiriyanKumarasamy1-0/+2
Parse the native color bit and send it to freesync module for future use Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26drm/amd/dc: Trigger set power state task when display configuration changesRex Zhu1-0/+2
Revert "drm/amd/display: Remove call to amdgpu_pm_compute_clocks" This reverts commit dcd473770e86517543691bdb227103d6c781cd0a. when display configuration changes, dc need to update the changes to powerplay, also need to trigger a power state task. amdgpu_pm_compute_clocks is the interface to set power state task either dpm enabled or powerplay enabled Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-21Merge branch 'drm-next-4.20' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie8-284/+688
into drm-next This is a new pull for drm-next on top of last weeks with the following changes: - Fixed 64 bit divide - Fixed vram type on vega20 - Misc vega20 fixes - Misc DC fixes - Fix GDS/GWS/OA domain handling Previous changes from last week: amdgpu/kfd: - Picasso (new APU) support - Raven2 (new APU) support - Vega20 enablement - ACP powergating improvements - Add ABGR/XBGR display support - VCN JPEG engine support - Initial xGMI support - Use load balancing for engine scheduling - Lots of new documentation - Rework and clean up i2c and aux handling in DC - Add DP YCbCr 4:2:0 support in DC - Add DMCU firmware loading for Raven (used for ABM and PSR) - New debugfs features in DC - LVDS support in DC - Implement wave kill for gfx/compute (light weight reset for shaders) - Use AGP aperture to avoid gart mappings when possible - GPUVM performance improvements - Bulk moves for more efficient GPUVM LRU handling - Merge amdgpu and amdkfd into one module - Enable gfxoff and stutter mode on Raven - Misc cleanups Scheduler: - Load balancing support - Bug fixes ttm: - Bulk move functionality - Bug fixes radeon: - Misc cleanups Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180920150438.12693-1-alexander.deucher@amd.com
2018-09-14drm/amd/display: Drop amdgpu_dm_prev_state structLeo Li1-9/+0
[Why] It's not being used [How] Nuke it Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amd/display: Drop amdgpu_display_manager.dal memberLeo Li2-4/+0
[Why] It's not being used anymore. [How] Nuke it Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amdgpu/display: return proper error codes in dmAlex Deucher1-4/+4
Replace -1 with proper error codes. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amdgpu: simplify Raven, Raven2, and Picasso handlingAlex Deucher1-6/+2
Treat them all as Raven rather than adding a new picasso asic type. This simplifies a lot of code and also handles the case of rv2 chips with the 0x15d8 pci id. It also fixes dmcu fw handling for picasso. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amd/display: Add DMCU firmware versionDavid Francis2-0/+3
Read the version number from the common firmware header and store it in the dm struct Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amd/display/dm: add picasso supportLikun Gao1-2/+6
Add support for picasso to the display manager. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-13drm/amd/display: Fix pflip IRQ status after gpu reset.Andrey Grodzovsky1-0/+1
Problem: After GPU reset pflip completion IRQ is disabled and hence any subsequent mode set or plane update leads to hang. Fix: Unless acrtc->otg_inst is initialized to -1 during display block initializtion then durng resume from GPU reset amdgpu_irq_gpu_reset_resume_helper will override CRTC 0 pflip IRQ value with whatever value was on every other unused CRTC because dm_irq_state will do irq_source = dal_irq_type + acrtc->otg_inst where acrtc->otg_inst will be 0 for every unused CRTC. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-12drm/amd/display: fix ptr_ret.cocci warningskbuild test robot1-4/+1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c:771:1-3: WARNING: PTR_ERR_OR_ZERO can be used Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR Generated by: scripts/coccinelle/api/ptr_ret.cocci Fixes: e498eb713604 ("drm/amd/display: Add support for hw_state logging via debugfs") CC: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-12drm/amd: Add DM DMCU supportDavid Francis2-1/+92
DMCU (Display Microcontroller Unit) is a GPU chip involved in eDP features like Adaptive Backlight Modulation and Panel Self Refresh. DC is already fully equipped to initialize DMCU as long as the firmware is loaded. At the moment only the raven firmware is available. A single .bin file is loaded by the kernel's loading mechanism and split into two ucodes according to the header. DMCU is optional, so if the firmware is not found, no error or warning is raised. Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-10drm/amd/display: Remove call to amdgpu_pm_compute_clocksDavid Francis1-8/+0
[Why] The extraneous call to amdgpu_pm_compute_clocks is deprecated. [How] Remove it. Signed-off-by: David Francis <David.Francis@amd.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-10drm/amd/display: Use DRM helper for best_encoderLeo Li1-23/+1
[Why] Our implementation is functionally identical to DRM's Note that instead of checking if the provided id is 0, the helper follows through with the mode object search. However, It will still return NULL, since 0 is not a valid object id, and missed searches will return NULL. [How] Remove our implementation, and replace it with drm_atomic_helper_best_encoder. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-10drm/amd/display: Build stream update and plane updates in dmBhawanpreet Lakha1-1/+115
[Why] We currently lock modeset by setting a boolean in dm. We want to lock Based on what DC tells us. [How] Build stream_updates and plane_update based on what changed. Then we call check_update_surfaces_for_stream() to get the update type We lock only if update_type is not fast Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-07Merge tag 'drm-misc-next-2018-09-05' of ↵Dave Airlie4-6/+33
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 4.20: UAPI Changes: - Add userspace dma-buf device to turn memfd regions into dma-bufs (Gerd) - Add per-plane blend mode property (Lowry) - Change in drm_fourcc.h is documentation only (Brian) Cross-subsystem Changes: - None Core Changes: - Remove user logspam and useless lock in vma_offset_mgr destroy (Chris) - Add get/verify_crc_source for improved crc source selection (Mahesh) - Add __drm_atomic_helper_plane_reset to reduce copypasta (Alexandru) Driver Changes: - various: Replance ref/unref calls with drm_dev_get/put (Thomas) - bridge: Add driver for TI SN65DSI86 chip (Sandeep) - rockchip: Add PX30 support (Sandy) - sun4i: Add support for R40 TCON (Jernej) - vkms: Continued building out vkms, added gem support (Haneen)Driver Changes: - various: fbdev: Wrap remove_conflicting_framebuffers with resource_len accessors to remove a bunch of cargo-cult (Michał) - rockchip: Add rgb output iface support + fixes (Sandy/Heiko) - nouveau/amdgpu: Add cec-over-aux support (Hans) - sun4i: Add support for Allwinner A64 (Jagan) Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Michał Mirosław <mirq-linux@rere.qmqm.pl> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Sandy Huang <hjc@rock-chips.com> Cc: Hans Verkuil <hans.verkuil@cisco.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Dave Airlie <airlied@redhat.com> From: Sean Paul <sean@poorly.run> Link: https://patchwork.freedesktop.org/patch/msgid/20180905202210.GA95199@art_vandelay
2018-08-31drm/amdgpu: add DisplayPort CEC-Tunneling-over-AUX supportHans Verkuil2-1/+10
Add DisplayPort CEC-Tunneling-over-AUX support to amdgpu. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/de9586bb-151e-bae9-b8e3-14db107a60df@xs4all.nl
2018-08-27drm/amd/display: Support reading hw state from debugfs fileNicholas Kazlauskas2-12/+108
[Why] Logging hardware state can be done by triggering a write to the debugfs file. It would also be useful to be able to read the hardware state from the debugfs file to be able to generate a clean log without timestamps. [How] Usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_dtn_log Threading is an obvious concern when dealing with multiple debugfs operations and blocking on global state in dm or dc seems unfavorable. Adding an extra parameter for the debugfs log context state is the implementation done here. Existing code that made use of DTN_INFO and its associated macros needed to be refactored to support this. We don't know the size of the log in advance so it reallocates the log string dynamically. Once the log has been generated it's copied into the user supplied buffer for the debugfs. This allows for seeking support but it's worth nothing that unlike triggering output via dmesg the hardware state might change in-between reads if your buffer size is too small. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amd/display: Improve spelling, grammar, and formatting of amdgpu_dm.c ↵David Francis1-80/+109
comments [Why] Good spelling and grammar makes comments more pleasant and clearer. Linux has coding standards for comments that we should try to follow. [How] Fix obvious spelling and grammar issues Ensure all comments use '/*' and '*/' and multi-line comments follow linux convention Remove line-of-stars comments that do not separate sections of code and comments referring to lines of code that have since been removed Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amd/display: Add support for hw_state logging via debugfsNicholas Kazlauskas4-4/+77
[Why] We have logging methods for printing hardware state for newer ASICs but no way to trigger the log output. [How] Add support for triggering the output via writing to a debugfs file entry. Log output currently goes into dmesg for convenience, but accessing via a read should be possible later. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amd/display: Use non-deprecated vblank handlerLeo (Sunpeng) Li1-6/+4
[Why] drm_handle_vblank is deprecated. Use drm_crtc_handle_vblank instead. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amdgpu/display: add support for LVDS (v5)Alex Deucher1-0/+2
This adds support for LVDS displays. v2: add support for spread spectrum, sink detect v3: clean up enable_lvds_output v4: fix up link_detect v5: remove assert on 888 format Bug: https://bugs.freedesktop.org/show_bug.cgi?id=105880 Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amd/display: Create new i2c resourceDavid Francis1-5/+4
[Why] I2C code did not match dc resource model and was generally unpleasant [How] Move code into new svelte dce_i2c files, replacing various i2c objects with two structs: dce_i2c_sw and dce_i2c_hw. Fully split sw and hw code paths. Remove all redundant declarations. Use address lists to distinguish between versions. Change dce80 code to newer register access macros. Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amd/display: add config for sending VSIFAnthony Koo1-0/+1
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amd/display: Refactor FreeSync moduleAnthony Koo3-150/+166
Remove dependency on internal sink map and instead use existing stream and plane state Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amdgpu: fill in amdgpu_dm_remove_sink_from_freesync_moduleHarry Wentland1-11/+29
Add code to tear down freesync modules when disabled. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amd/display: enable ABGR and XBGR formats (v4)Mauro Rossi1-0/+6
SURFACE_PIXEL_FORMAT_GRPH_ABGR8888 is supported in amd/display/dc/dc_hw_types.h and the necessary crossbars register controls to swap red and blue channels are already implemented in drm/amd/display/dc/dce/dce_mem_input.c (v4) Logic to handle new formats is added only in amdgpu_dm module. Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amd/display: Use DGAM ROM or RAMVitaly Prosyak1-2/+4
[Why] Optimize gamma programming [How] Use ROM for optimization when it is possible. Use RAM only when it is necessary. Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amd/display: pass the right num of modes addedMikita Lipski1-1/+2
[why] In case if edid is null or corrupted we need to manually add a single failsafe mode (640x480). If zero modes returned DRM adds a different failsafe mode that is not accepted by DP 1.2 compliance test [how] Return the number of modes manually added Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amd/display: Move PME to function pointer call semanticsJun Lei1-4/+4
[why] Legacy IRI style is not linux friendly. [how] New function pointer call semantics will be used for all future PPLIB/DAL interfaces, and also some existing will be refactored. This change defines how the new function pointer structures will look, as well as implements Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amd/display: Fix bug use wrong pp interfaceRex Zhu1-2/+10
Used wrong pp interface, the original interface is exposed by dpm on SI and paritial CI. Pointed out by Francis David <david.francis@amd.com> v2: dal only need to set min_dcefclk and min_fclk to smu. so use display_clock_voltage_request interface, instand of update all display configuration. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27Merge drm/drm-next into drm-misc-nextSean Paul10-414/+1530
Now that 4.19-rc1 is cut, backmerge it into -misc-next. Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-08-24drm/amd/display: Fix bug use wrong pp interfaceRex Zhu1-2/+10
Used wrong pp interface, the original interface is exposed by dpm on SI and paritial CI. Pointed out by Francis David <david.francis@amd.com> v2: dal only need to set min_dcefclk and min_fclk to smu. so use display_clock_voltage_request interface, instand of update all display configuration. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-04-03 23:14:22 +0000