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path: root/drivers/gpu/drm/amd/amdgpu
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2016-05-11drm/amdgpu: fix TC cache flushingMarek Olšák2-1/+4
TC_WB_ACTION must be set according to the docs Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu/dce11: fix audio offset for asics with >7 audio pinsAlex Deucher2-1/+3
Missing offset in the audio offset array. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: fix and cleanup user fence handling v2Christian König4-47/+38
We leaked the BO in the error pass, additional to that we only have one user fence for all IBs in a job. v2: remove white space changes Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: move VM fields into jobChristian König14-66/+66
They are the same for all IBs. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: move the context from the IBs into the jobChristian König4-17/+24
We only have one context for all IBs. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: move context switch handling into common code v2Christian König12-29/+25
It was a source of bugs to repeat that in each IP version. v2: rename parameter Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: move preamble IB handling into common codeChristian König3-9/+7
This fixes the handling which was completely broken when you ad more than one preamble IB. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu/gfx7: fix pipeline syncChunming Zhou1-12/+13
Need to wait on the fence as well. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11amdgpu/uvd: separate context buffer from DPBSonny Jiang1-3/+59
Updated to handle latest UVD ucode. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: use fence_context to judge ctx switch v2Christian König3-4/+4
Use of the ctx pointer is not safe, because they are likely already be assigned to another ctx when doing comparing. v2: recreate from scratch, avoid all unnecessary changes. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk.Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amd/amdgpu: Added more named DRM info messages for debuggingTom St Denis1-10/+10
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amd/amdgpu: Add name field to amd_ip_funcs (v2)Tom St Denis30-1/+30
Add name that we can print out in kernel messages to aid in debugging. v2: drop DAL changes for upstream Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: Support DRM_MODE_PAGE_FLIP_ASYNC (v2)Alex Deucher6-27/+52
When this flag is set, we program the hardware to execute the flip during horizontal blank (i.e. for the next scanline) instead of during vertical blank (i.e. for the next frame). Ported from radeon commit: drm/radeon: Support DRM_MODE_PAGE_FLIP_ASYNC v2: drop DAL change for upstream Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu/dce11: don't share PLLs on PolarisAlex Deucher1-4/+0
They are part of the phy so you can't share them. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: Drop unused parameter for *get_sleep_divider_id_from_clockNils Wallménius1-4/+2
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: Simplify calculation in *get_sleep_divider_id_from_clockNils Wallménius2-7/+2
a / (1 << b) is equivalent to a >> b for unsigned values Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: Use max macro in *get_sleep_divider_id_from_clockNils Wallménius2-4/+2
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: fetch cu_info once at initAlex Deucher9-46/+25
Fetch this info once at init and just store the results for future requests. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amd: cleanup remaining spaces and tabs v2Christian König16-32/+32
This is the result of running the following commands: find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/[ \t]\+$//' {} \; find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/[ \t]\+$//' {} \; find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/ \+\t/\t/' {} \; find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/ \+\t/\t/' {} \; v2: drop changes to DAL and internal headers Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: remove define for reserved client IDChristian König2-2/+1
Just set it to zero instead. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: remove owner cleanup v2Christian König1-13/+0
The client ID is now unique, so no need to resert the owner fields any more. v2: remove unused variables as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: make the VMID owner always 64bitChristian König2-3/+3
Otherwise we could (in theory) run into problems on 32bit systems. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: two minor 80 char fixesChristian König3-8/+12
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: hdp flush&inval should always doMonk Liu1-7/+5
This fixes Tonga vm-fault issue when running disaster (a multiple context GL heavy tests), We should always flush & invalidate hdp no matter vm used or not. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-05-11drm/amd/amdgpu: Enable CG for UVD6 on CarrizoTom St Denis1-1/+2
Tested via vdpau/mpv. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: add pipeline sync for compute jobChunming Zhou1-1/+2
hardware ring is async processed, the job is executed in parallel. In some case, this will result vm fault, like jobs with different vmids. This works around a CPC hw issue which will eventually be fixed in fw. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: keep vm in job instead of ib (v2)Monk Liu12-30/+25
ib.vm is a legacy way to get vm, after scheduler implemented vm should be get from job, and all ibs from one job share the same vm, no need to keep ib.vm just move vm field to job. this patch as well add job as paramter to ib_schedule so it can get vm from job->vm. v2: agd: sqaush in: drm/amdgpu: check if ring emit_vm_flush exists in vm flush No vm flush on engines that don't support VM. bug: https://bugs.freedesktop.org/show_bug.cgi?id=95195 Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: make vmid owner be client_idChunming Zhou1-3/+3
Using the pointer is not adequate. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: add client id for every vmChunming Zhou2-0/+8
This adds a unique id for each vm client so we can properly track them. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: fix wrong release of vmid ownerChunming Zhou1-5/+9
The release of the vmid owner was not handled correctly. We need to take the lock and walk the lru list. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-09Merge tag 'v4.6-rc7' into drm-nextDave Airlie13-20/+46
Merge this back as we've built up a fair few conflicts, and I have some newer trees to pull in.
2016-05-06Merge branch 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie63-2659/+3324
into drm-next This is the first big radeon/amdgpu pull request for 4.7. Highlights: - Polaris support in amdgpu Current display stack on par with other asics, for advanced features DAL is required Power management support Support for GFX, Compute, SDMA, UVD, VCE - VCE and UVD init/fini cleanup in radeon - GPUVM improvements - Scheduler improvements - Clockgating improvements - Powerplay improvements - TTM changes to support driver specific LRU update mechanism - Radeon support for new Mesa features - ASYNC pageflip support for radeon - Lots of bug fixes and code cleanups * 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux: (180 commits) drm/amdgpu: Replace rcu_assign_pointer() with RCU_INIT_POINTER() drm/amdgpu: use drm_mode_vrefresh() rather than mode->vrefresh drm/amdgpu/uvd6: add bypass support for fiji (v3) drm/amdgpu/fiji: set UVD CG state when enabling UVD DPM (v2) drm/powerplay: add missing clockgating callback for tonga drm/amdgpu: Constify some tables drm/amd/powerplay: Delete dead struct declaration drm/amd/powerplay/hwmgr: don't add invalid voltage drm/amd/powerplay/hwmgr: prevent VDDC from exceeding 2V MAINTAINERS: Remove unneded wildcard for the Radeon/AMDGPU drivers drm/radeon: add cayman VM support for append packet. drm/amd/amdgpu: Add debugfs entries for smc/didt/pcie drm/amd/amdgpu: Drop print_status callbacks. drm/amd/powerplay: revise reading/writing pptable on Polaris10 drm/amd/powerplay: revise reading/writing pptable on Tonga drm/amd/powerplay: revise reading/writing pptable on Fiji drm/amd/powerplay: revise caching the soft pptable and add it's size drm/amd/powerplay: add dpm force multiple levels on cz/tonga/fiji/polaris (v2) drm/amd/powerplay: fix fan speed percent setting error on Polaris10 drm/amd/powerplay: fix bug dpm can't work when resume back on Polaris ...
2016-05-04drm/amdgpu: Replace rcu_assign_pointer() with RCU_INIT_POINTER()Muhammad Falak R Wani1-1/+1
The rcu_assign_pointer() ensures that the initialization of a structure is carried out before storing a pointer to that structre. It is always safe to use RCU_INIT_POINTER() to NULL a pointer, instead of rcu_assign_pointer(). This results in slightly smaller/faster code. The following semantic patch was used: <smpl> @@ @@ - rcu_assign_pointer + RCU_INIT_POINTER (..., NULL) </smpl> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Muhammad Falak R Wani <falakreyaz@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: use drm_mode_vrefresh() rather than mode->vrefreshAlex Deucher1-1/+1
This is a port of radeon commit: 3d2d98ee1af0cf6eebfbd6bff4c17d3601ac1284 drm/radeon: use drm_mode_vrefresh() rather than mode->vrefresh to amdgpu. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-05-04drm/amdgpu/uvd6: add bypass support for fiji (v3)Alex Deucher1-0/+19
Handle uvd clock bypass settings as part of clockgating setup. v2: fix gate logic v3: fix header include Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/amdgpu: Add debugfs entries for smc/didt/pcieTom St Denis2-9/+223
This adds 3 new files that can be read/written to access indirect GPU registers. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/amdgpu: Drop print_status callbacks.Tom St Denis29-1769/+0
First patch in series to move to user mode debug tools we're removing the print_status callbacks. These functions were unused at the moment anyway. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/powerplay: add dpm force multiple levels on cz/tonga/fiji/polaris (v2)Eric Huang1-15/+36
Allows you to force multiple levels rather than just one via the new sysfs interrface. v2: squash in: drm/amd/powerplay: ensure clock level set by user is valid. From Rex. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: fix memory leak in CGS (FW info)Mykola Lysenko1-34/+36
Previously requested FW pointer should not be overwritten on a subsequent call. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mykola Lysenko <Mykola.Lysenko@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: code style refine.Rex Zhu1-1/+1
Whitespace fix. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/amdgpu: fix 64-bit divisionSlava Grigorev1-2/+2
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: add polaris10/11 smc fw declarationFlora Cui1-0/+5
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: change ELM/BAF to Polaris10/Polaris11Flora Cui12-160/+162
Adjust to preferred code names. Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: add ELM/BAF pci idsFlora Cui1-0/+10
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: update the core VI support for ELM/BAFFlora Cui2-0/+89
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: ungate SMC clockgating first before suspendFlora Cui1-4/+13
46c34bcb6a15dd85329a39a5e72c62108626acdc put all block’s clockgating support in SMC. The sequence in suspend routine should be adjusted accordingly, otherwise it causes asic hang. Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/amdgpu: add power gating init for BaffinEric Huang1-0/+39
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/amdgpu: add power gating initialization support for GFX8.0Eric Huang2-3/+364
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/amdgpu: add medium grain powergating support for BaffinEric Huang1-0/+95
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/amdgpu: add query GFX cu info in CGS query system infoEric Huang1-0/+5
Needed for per CU powergating. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-06-02 19:17:46 +0000