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path: root/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
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2018-02-19drm/amdgpu: remove now superflous *_hdp operationChristian König1-17/+1
All HDP invalidation and most flush can now be replaced by the generic ASIC function. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: implement gmc_v9_0_emit_flush_gpu_tlbChristian König1-54/+7
Unify tlb flushing for gmc v9. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: wire up emit_wreg for VCN v1Christian König1-0/+9
Needed for vm_flush unification. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: forward pasid to backend flush implementationsChristian König1-2/+4
rd the pasid from the VM code to the emit_vm_flush function and update all implementations with the new parameter. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: move struct gart_funcs into amdgpu_gmc.hChristian König1-4/+4
And rename it to struct gmc_funcs. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Samuel Li <Samuel.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/amdgpu: rename vm_id to vmidChristian König1-18/+18
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.c sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.h Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12drm/amdgpu: allow get_vm_pde to change flags as wellChristian König1-5/+7
And also provide the level for which we need a PDE. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-08drm/admgpu: Reduce the usage of soc15ip.hShaoyun Liu1-1/+0
Remove the header where it's not used. Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-08drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offsetShaoyun Liu1-0/+14
Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-08drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const arrayShaoyun Liu1-2/+13
Handle dynamic offsets correctly in static arrays. Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/include:cleanup raven1 vcn header files.Feifei Xu1-2/+2
Cleanup asic_reg/raven1/VCN folder. Remove unused vcn_1_0_default.h. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/include:cleanup raven1 mmhub header files.Feifei Xu1-2/+2
Cleanup asic_reg/raven1/MMHUB folder.Remove unused mmhub_9_1_default.h Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/include:cleanup vega10 header files.Feifei Xu1-1/+1
Remove asic_reg/vega10 folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/include:cleanup vega10 hdp header files.Feifei Xu1-1/+1
Cleanup asic_reg/vega10/HDP folder, remove hdp_4_0_default.h Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-11-28drm/amdgpu: Set adev->vcn.irq.num_types for VCNMichel Dänzer1-1/+1
We were setting adev->uvd.irq.num_types instead. Fixes: 9b257116e784 ("drm/amdgpu: add vcn enc irq support") Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2017-09-26drm/amdgpu:use formal register to trigger hdp invalidateMonk Liu1-1/+1
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/amdgpu: Port VCN over to new SOC15 macrosTom St Denis1-82/+82
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-31drm/amdgpu: cleanup adjust_mc_addr handling v4Christian König1-8/+4
Rename adjust_mc_addr to get_vm_pde and check the address bits in one place. v2: handle vcn as well, keep setting the valid bit manually, add a BUG_ON() for GMC v6, v7 and v8 as well. v3: handle vcn_v1_0_enc_ring_emit_vm_flush as well. v4: fix the BUG_ON mask for GFX6-8 Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: fix merge of vcn_v1_0.c v2Christian König1-0/+2
That line got missed during the merge. v2: fix vcn_v1_0_enc_ring_emit_vm_flush as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: correct emit frame size for vcn dec/enc ringHawking Zhang1-2/+2
only mmhub will be invalidated during vcn dec/enc vm flush Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: correct vmhub for vcn dec/enc ringHawking Zhang1-0/+2
This got missed due to differences in the trees when raven support was merged. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: ken wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu/vcn: remove duplicate maskAlex Deucher1-1/+0
Looks like a copy past issue. Reported-by: Julia Lawall <julia.lawall@lip6.fr> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: enable sw clock gating for vcnHuang Rui1-2/+2
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu/vcn: add sw clock gatingHuang Rui1-2/+205
Add sw controlled clockgating for VCN. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: add vcn firmware header offsetLeo Liu1-1/+2
New firmware add psp header. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: add vcn enc ib testLeo Liu1-0/+1
Update and enable the vcn encode IB test. Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: enable vcn encode ring testsLeo Liu1-2/+13
Wire up the callback and enable them. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: add vcn enc irq supportLeo Liu1-3/+25
Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: add vcn enc ring type and functionsLeo Liu1-0/+170
Add the ring function callbacks for the encode rings. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: add vcn enc ringsLeo Liu1-1/+27
Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: change vcn dec rb command specific for decodeLeo Liu1-6/+6
Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: implement new vcn cache window programmingLeo Liu1-18/+16
Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: implement insert end ring function for vcn decodeLeo Liu1-1/+16
Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: implement vcn start RB commandLeo Liu1-1/+20
Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: expose vcn RB commandLeo Liu1-4/+4
Signed-off-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: move vcn ring test to amdgpu_vcn.cLeo Liu1-44/+1
Hope it will be generic for vcn later Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: add vcn ip block and typeLeo Liu1-0/+9
Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: add vcn irq functionsLeo Liu1-0/+32
Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: add vcn decode ring type and functionsLeo Liu1-0/+266
Add the ring function callbacks for the decode ring. Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: add vcn decode ring supportLeo Liu1-0/+43
Add the decode ring init. Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24drm/amdgpu: add vcn ip block functions (v2)Leo Liu1-0/+417
Fill in the core VCN 1.0 setup functionality. v2: squash in fixup (Alex) Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-04-08 14:37:36 +0000