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path: root/drivers/gpio/gpio-max77620.c
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2019-11-05Merge tag 'v5.4-rc6' into develLinus Walleij1-3/+3
Linux 5.4-rc6
2019-10-05gpio: max77620: Fix interrupt handlingTimo Alho1-114/+117
The interrupt-related register fields on the MAX77620 GPIO controller share registers with GPIO related fields. If the IRQ chip is implemented with regmap-irq, this causes the IRQ controller code to overwrite fields previously configured by the GPIO controller code. Two examples where this causes problems are the NVIDIA Jetson TX1 and Jetson TX2 boards, where some of the GPIOs are used to enable vital power regulators. The MAX77620 GPIO controller also provides the USB OTG ID pin. If configured as an interrupt, this causes some of the regulators to be powered off. Signed-off-by: Timo Alho <talho@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20191002122825.3948322-3-thierry.reding@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-10-04gpio: max77620: Do not allocate IRQs upfrontThierry Reding1-1/+1
regmap_add_irq_chip() will try to allocate all of the IRQ descriptors upfront if passed a non-zero irq_base parameter. However, the intention is to allocate IRQ descriptors on an as-needed basis if possible. Pass 0 instead of -1 to fix that use-case. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20191002122825.3948322-2-thierry.reding@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-10-04gpio: max77620: Use correct unit for debounce timesThierry Reding1-3/+3
The gpiod_set_debounce() function takes the debounce time in microseconds. Adjust the switch/case values in the MAX77620 GPIO to use the correct unit. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20191002122825.3948322-1-thierry.reding@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05gpio: Remove dev_err() usage after platform_get_irq()Stephen Boyd1-3/+1
We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: linux-gpio@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20190730181557.90391-16-swboyd@chromium.org Acked-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422Thomas Gleixner1-4/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 101 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190531190113.822954939@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-12-19regmap: regmap-irq/gpio-max77620: add level-irq supportMatti Vaittinen1-32/+64
Add level active IRQ support to regmap-irq irqchip. Change breaks existing regmap-irq type setting. Convert the existing drivers which use regmap-irq with trigger type setting (gpio-max77620) to work with this new approach. So we do not magically support level-active IRQs on gpio-max77620 - but add support to the regmap-irq for chips which support them =) We do not support distinguishing situation where HW supports rising and falling edge detection but not both. Separating this would require inventing yet another flags for IRQ types. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-14gpio: max77620: Make regmap_irq_chip constBhumika Goyal1-1/+1
Make the structure const as it is only passed to the function devm_regmap_add_irq_chip having the corresponding argument as const. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-26pinctrl / gpio: Introduce .set_config() callback for GPIO chipsMika Westerberg1-10/+10
Currently we already have two pin configuration related callbacks available for GPIO chips .set_single_ended() and .set_debounce(). In future we expect to have even more, which does not scale well if we need to add yet another callback to the GPIO chip structure for each possible configuration parameter. Better solution is to reuse what we already have available in the generic pinconf. To support this, we introduce a new .set_config() callback for GPIO chips. The callback takes a single packed pin configuration value as parameter. This can then be extended easily beyond what is currently supported by just adding new types to the generic pinconf enum. If the GPIO driver is backed up by a pinctrl driver the GPIO driver can just assign gpiochip_generic_config() (introduced in this patch) to .set_config and that will take care configuration requests are directed to the pinctrl driver. We then convert the existing drivers over .set_config() and finally remove the .set_single_ended() and .set_debounce() callbacks. Suggested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-11-16gpio: max77620: add compatible string to device id listVenkat Reddy Talla1-0/+1
Adding max20024 compatible string to the device id list to support both max77620 and max20024 devices. Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-10-24gpio: max77620: Remove unused fields from struct max77620_gpioAxel Lin1-8/+2
Current code does not use gpio_irq/irq_base/gpio_base fields from struct max77620_gpio, so remove them. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-07-04gpio: max77620: get gpio value based on directionVenkat Reddy Talla1-1/+4
Gpio direction is determined by DIRx bit of GPIO configuration register, return max77620 gpio value based on direction in or out. Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-07gpio: max77620: use the new open drain callbackLaxman Dewangan1-0/+23
The MAX77620 have a GPIO pins which can act as open drain or push pull mode. Implement support for controlling this from GPIO descriptor tables or other hardware descriptions such as device tree by implementing the .set_single_ended() callback. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-07gpio: max77620: Configure interrupt trigger levelLaxman Dewangan1-8/+59
The GPIO sub modules of MAX77620 offers to configure the GPIO interrupt trigger level as RISING and FALLING edge. Pass this information to regmap-irg when registering for GPIO interrupts. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-07gpio: max77620: add gpio driver for MAX77620/MAX20024Laxman Dewangan1-0/+238
MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO pins. It also supports interrupts from these pins. Add GPIO driver for these pins to control via GPIO APIs. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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