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2020-08-05Merge branch 'for-linus' into fixesVinod Koul42-647/+717
Signed-off-by: Vinod Koul <vkoul@kernel.org> Conflicts: drivers/dma/idxd/sysfs.c
2020-07-27dmaengine: Actions: Add support for S700 DMA engineAmit Singh Tomar1-15/+42
DMA controller present on S700 SoC is compatible with the one on S900 (as most of registers are same), but it has different DMA descriptor structure where registers "fcnt" and "ctrlb" uses different encoding. For instance, on S900 "fcnt" starts at offset 0x0c and uses upper 12 bits whereas on S700, it starts at offset 0x1c and uses lower 12 bits. This commit adds support for DMA controller present on S700. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Link: https://lore.kernel.org/r/1595180527-11320-4-git-send-email-amittomer25@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-27dmaengine: Actions: get rid of bit fields from dma descriptorAmit Singh Tomar1-42/+56
At the moment, Driver uses bit fields to describe registers of the DMA descriptor structure that makes it less portable and maintainable, and Andre suugested(and even sketched important bits for it) to make use of array to describe this DMA descriptors instead. It gives the flexibility while extending support for other platform such as Actions S700. This commit removes the "owl_dma_lli_hw" (that includes bit-fields) and uses array to describe DMA descriptor. Suggested-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1595180527-11320-3-git-send-email-amittomer25@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-27dmaengine: dw: Initialize max_sg_burst capabilitySerge Semin1-0/+12
Multi-block support provides a way to map the kernel-specific SG-table so the DW DMA device would handle it as a whole instead of handling the SG-list items or so called LLP block items one by one. So if true LLP list isn't supported by the DW DMA engine, then soft-LLP mode will be utilized to load and execute each LLP-block one by one. The soft-LLP mode of the DMA transactions execution might not work well for some DMA consumers like SPI due to its Tx and Rx buffers inter-dependency. Let's initialize the max_sg_burst DMA channels capability based on the nollp flag state. If it's true, no hardware accelerated LLP is available and max_sg_burst should be set with 1, which means that the DMA engine can handle only a single SG list entry at a time. If noLLP is set to false, then hardware accelerated LLP is supported and the DMA engine can handle infinite number of SG entries in a single DMA transaction. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200723005848.31907-11-Sergey.Semin@baikalelectronics.ru Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-27dmaengine: dw: Introduce max burst length hw configSerge Semin3-0/+23
IP core of the DW DMA controller may be synthesized with different max burst length of the transfers per each channel. According to Synopsis having the fixed maximum burst transactions length may provide some performance gain. At the same time setting up the source and destination multi size exceeding the max burst length limitation may cause a serious problems. In our case the DMA transaction just hangs up. In order to fix this lets introduce the max burst length platform config of the DW DMA controller device and don't let the DMA channels configuration code exceed the burst length hardware limitation. Note the maximum burst length parameter can be detected either in runtime from the DWC parameter registers or from the dedicated DT property. Depending on the IP core configuration the maximum value can vary from channel to channel so by overriding the channel slave max_burst capability we make sure a DMA consumer will get the channel-specific max burst length. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200723005848.31907-10-Sergey.Semin@baikalelectronics.ru Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-27dmaengine: dw: Initialize min and max burst DMA device capabilitySerge Semin1-0/+2
According to the DW APB DMAC data book the minimum burst transaction length is 1 and it's true for any version of the controller since isn't parametrised in the coreAssembler so can't be changed at the IP-core synthesis stage. The maximum burst transaction can vary from channel to channel and from controller to controller depending on a IP-core parameter the system engineer activated during the IP-core synthesis. Let's initialise both min_burst and max_burst members of the DMA controller descriptor with extreme values so the DMA clients could use them to properly optimize the DMA requests. The channels and controller-specific max_burst length initialization will be introduced by the follow-up patches. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200723005848.31907-9-Sergey.Semin@baikalelectronics.ru Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-27dmaengine: dw: Set DMA device max segment size parameterSerge Semin1-0/+7
Maximum block size DW DMAC configuration corresponds to the max segment size DMA parameter in the DMA core subsystem notation. Lets set it with a value specific to the probed DW DMA controller. It shall help the DMA clients to create size-optimized SG-list items for the controller. This in turn will cause less dw_desc allocations, less LLP reinitializations, better DMA device performance. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200723005848.31907-8-Sergey.Semin@baikalelectronics.ru Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-27dmaengine: dw: Take HC_LLP flag into account for noLLP auto-configSerge Semin2-1/+11
Full multi-block transfers functionality is enabled in DW DMA controller only if CHx_MULTI_BLK_EN is set. But LLP-based transfers can be executed only if hardcode channel x LLP register feature isn't enabled, which can be switched on at the IP core synthesis for optimization. If it's enabled then the LLP register is hardcoded to zero, so the blocks chaining based on the LLPs is unsupported. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200723005848.31907-7-Sergey.Semin@baikalelectronics.ru Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-27dmaengine: Introduce DMA-device device_caps callbackSerge Semin1-0/+10
There are DMA devices (like ours version of Synopsys DW DMAC) which have DMA capabilities non-uniformly redistributed between the device channels. In order to provide a way of exposing the channel-specific parameters to the DMA engine consumers, we introduce a new DMA-device callback. In case if provided it gets called from the dma_get_slave_caps() method and is able to override the generic DMA-device capabilities. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200723005848.31907-6-Sergey.Semin@baikalelectronics.ru Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-27dmaengine: Introduce max SG burst capabilitySerge Semin1-0/+1
Some devices may lack the support of the hardware accelerated SG list entries automatic walking through and execution. In this case a burden of the SG list traversal and DMA engine re-initialization lies on the DMA engine driver (normally implemented by using a DMA transfer completion IRQ to recharge the DMA device with a next SG list entry). But such solution may not be suitable for some DMA consumers. In particular SPI devices need both Tx and Rx DMA channels work synchronously in order to avoid the Rx FIFO overflow. In case if Rx DMA channel is paused for some time while the Tx DMA channel works implicitly pulling data into the Rx FIFO, the later will be eventually overflown, which will cause the data loss. So if SG list entries aren't automatically fetched by the DMA engine, but are one-by-one manually selected for execution in the ISRs/deferred work/etc., such problem will eventually happen due to the non-deterministic latencies of the service execution. In order to let the DMA consumer know about the DMA device capabilities regarding the hardware accelerated SG list traversal we introduce the max_sg_burst capability. It is supposed to be initialized by the DMA engine driver with 0 if there is no limitation of the number of SG entries atomically executed and with non-zero value if there is such constraints, so the upper limit is determined by the number set to the property. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200723005848.31907-5-Sergey.Semin@baikalelectronics.ru Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-27dmaengine: Introduce min burst length capabilitySerge Semin1-0/+1
Some hardware aside from default 0/1 may have greater minimum burst transactions length constraints. Here we introduce the DMA device and slave capability, which if required can be initialized by the DMA engine driver with the device-specific value. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200723005848.31907-4-Sergey.Semin@baikalelectronics.ru Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-27dmaengine: ti: k3-udma: Query throughput level information from hardwarePeter Ujfalusi2-29/+30
The CAP3 register contains information about the number of HCHAN (High Capacity) and UCHAN (Ultra High Capacity) channels in UDMAP. Based on this information the start indexes of the levels can be calculated without a need of a table in the match data. On am654 the CAP3 does not contain information about the number different channels. Set up the tpl information based on the available documentation. This change will allow to use the same compatible for different SoCs where the only difference is the number of channel types. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20200717120903.8774-3-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-27dmaengine: ti: k3-udma: Use defines for capabilities register parsingPeter Ujfalusi2-6/+12
Add defines for the CAP register fields to make the code self explaining. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20200717120903.8774-2-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-17dmaengine: Extend NXP QDMA driver to check transmission errorsKoehrer Mathias (ETAS/EES-SL)1-6/+57
Extend NXP QDMA driver to check transmission errors The NXP QDMA driver (fsl-qdma.c) does not check the status bits that indicate if a DMA transfer has been completed successfully. This patch extends the driver to do exactly this. Signed-off-by: Mathias Koehrer <mathias.koehrer@etas.com> Link: https://lore.kernel.org/r/744443c0462aac2df4754f99500a911527c0b235.camel@bosch.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: ioat: Fix some parameter misspelling and provide description for ↵Lee Jones1-3/+4
phys_complete Fixes the following W=1 kernel build warning(s): drivers/dma/ioat/dma.c:202: warning: Function parameter or member 'ioat_chan' not described in 'ioat_update_pending' drivers/dma/ioat/dma.c:202: warning: Excess function parameter 'ioat' description in 'ioat_update_pending' drivers/dma/ioat/dma.c:465: warning: Function parameter or member 'ioat_chan' not described in 'ioat_check_space_lock' drivers/dma/ioat/dma.c:465: warning: Excess function parameter 'ioat' description in 'ioat_check_space_lock' drivers/dma/ioat/dma.c:591: warning: Function parameter or member 'ioat_chan' not described in '__cleanup' drivers/dma/ioat/dma.c:591: warning: Function parameter or member 'phys_complete' not described in '__cleanup' drivers/dma/ioat/dma.c:591: warning: Excess function parameter 'ioat' description in '__cleanup' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Dave Jiang <dave.jiang@intel.com> Cc: Leonid Ravich <Leonid.Ravich@emc.com> Link: https://lore.kernel.org/r/20200714111546.1755231-18-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: ioat: init: Correct misspelling of function parameter 'c' for channelLee Jones1-1/+1
Fixes the following W=1 kernel build warning(s): drivers/dma/ioat/init.c:608: warning: Function parameter or member 'c' not described in 'ioat_free_chan_resources' drivers/dma/ioat/init.c:608: warning: Excess function parameter 'chan' description in 'ioat_free_chan_resources' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Logan Gunthorpe <logang@deltatee.com> Link: https://lore.kernel.org/r/20200714111546.1755231-17-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: mv_xor_v2: Supply some missing 'struct mv_xor_v2_device' ↵Lee Jones1-1/+5
attribute docs Fixes the following W=1 kernel build warning(s): drivers/dma/mv_xor_v2.c:168: warning: Function parameter or member 'clk' not described in 'mv_xor_v2_device' drivers/dma/mv_xor_v2.c:168: warning: Function parameter or member 'reg_clk' not described in 'mv_xor_v2_device' drivers/dma/mv_xor_v2.c:168: warning: Function parameter or member 'irq_tasklet' not described in 'mv_xor_v2_device' drivers/dma/mv_xor_v2.c:168: warning: Function parameter or member 'hw_queue_idx' not described in 'mv_xor_v2_device' drivers/dma/mv_xor_v2.c:168: warning: Function parameter or member 'msi_desc' not described in 'mv_xor_v2_device' Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20200714111546.1755231-16-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: xgene-dma: Provide descriptions for 'dev' and 'clk' in device's ddataLee Jones1-0/+2
Fixes the following W=1 kernel build warning(s): drivers/dma/xgene-dma.c:310: warning: Function parameter or member 'dev' not described in 'xgene_dma' drivers/dma/xgene-dma.c:310: warning: Function parameter or member 'clk' not described in 'xgene_dma' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Prasad Sahu <rsahu@apm.com> Cc: Loc Ho <lho@apm.com> Link: https://lore.kernel.org/r/20200714111546.1755231-15-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: nbpfaxi: Provide some missing attribute docs and split out slave infoLee Jones1-3/+10
Fixes the following W=1 kernel build warning(s): drivers/dma/nbpfaxi.c:157: warning: Function parameter or member 'chan' not described in 'nbpf_desc' drivers/dma/nbpfaxi.c:220: warning: Function parameter or member 'tasklet' not described in 'nbpf_channel' drivers/dma/nbpfaxi.c:220: warning: Function parameter or member 'slave_src_addr' not described in 'nbpf_channel' drivers/dma/nbpfaxi.c:220: warning: Function parameter or member 'slave_src_width' not described in 'nbpf_channel' drivers/dma/nbpfaxi.c:220: warning: Function parameter or member 'slave_src_burst' not described in 'nbpf_channel' drivers/dma/nbpfaxi.c:220: warning: Function parameter or member 'slave_dst_addr' not described in 'nbpf_channel' drivers/dma/nbpfaxi.c:220: warning: Function parameter or member 'slave_dst_width' not described in 'nbpf_channel' drivers/dma/nbpfaxi.c:220: warning: Function parameter or member 'slave_dst_burst' not described in 'nbpf_channel' drivers/dma/nbpfaxi.c:220: warning: Function parameter or member 'running' not described in 'nbpf_channel' drivers/dma/nbpfaxi.c:220: warning: Function parameter or member 'paused' not described in 'nbpf_channel' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Alexei Starovoitov <ast@kernel.org> Cc: Daniel Borkmann <daniel@iogearbox.net> Cc: Martin KaFai Lau <kafai@fb.com> Cc: Song Liu <songliubraving@fb.com> Cc: Yonghong Song <yhs@fb.com> Cc: Andrii Nakryiko <andriin@fb.com> Cc: John Fastabend <john.fastabend@gmail.com> Cc: KP Singh <kpsingh@chromium.org> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: netdev@vger.kernel.org Cc: bpf@vger.kernel.org Link: https://lore.kernel.org/r/20200714111546.1755231-14-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: iop-adma: Function parameter documentation must adhere to correct ↵Lee Jones1-2/+1
formatting Also remove superfluous entry. Fixes the following W=1 kernel build warning(s): drivers/dma/iop-adma.c:418: warning: Function parameter or member 'chan' not described in 'iop_adma_alloc_chan_resources' Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20200714111546.1755231-13-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: imx-sdma: Correct formatting issue and provide 2 new descriptionsLee Jones1-1/+3
Fixes the following W=1 kernel build warning(s): drivers/dma/imx-sdma.c:383: warning: Function parameter or member 'slave_config' not described in 'sdma_channel' drivers/dma/imx-sdma.c:383: warning: Function parameter or member 'context_loaded' not described in 'sdma_channel' drivers/dma/imx-sdma.c:383: warning: Function parameter or member 'terminate_worker' not described in 'sdma_channel' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Link: https://lore.kernel.org/r/20200714111546.1755231-12-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: fsl-qdma: Fix 'struct fsl_qdma_format' formatting issueLee Jones1-1/+1
Kerneldoc formatting for attributes should be '@.*: '. Fixes the following W=1 kernel build warning(s): drivers/dma/fsl-qdma.c:154: warning: Function parameter or member 'data' not described in 'fsl_qdma_format' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Wen He <wen.he_1@nxp.com> Cc: Jiaheng Fan <jiaheng.fan@nxp.com> Link: https://lore.kernel.org/r/20200714111546.1755231-11-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: sun4i-dma: Demote obvious misuse of kerneldoc to standard comment ↵Lee Jones1-6/+6
blocks No attempt has been made to document any of the demoted functions here. Fixes the following W=1 kernel build warning(s): drivers/dma/sun4i-dma.c:321: warning: Function parameter or member 'priv' not described in '__execute_vchan_pending' drivers/dma/sun4i-dma.c:321: warning: Function parameter or member 'vchan' not described in '__execute_vchan_pending' drivers/dma/sun4i-dma.c:435: warning: Function parameter or member 'chan' not described in 'generate_ndma_promise' drivers/dma/sun4i-dma.c:435: warning: Function parameter or member 'src' not described in 'generate_ndma_promise' drivers/dma/sun4i-dma.c:435: warning: Function parameter or member 'dest' not described in 'generate_ndma_promise' drivers/dma/sun4i-dma.c:435: warning: Function parameter or member 'len' not described in 'generate_ndma_promise' drivers/dma/sun4i-dma.c:435: warning: Function parameter or member 'sconfig' not described in 'generate_ndma_promise' drivers/dma/sun4i-dma.c:435: warning: Function parameter or member 'direction' not described in 'generate_ndma_promise' drivers/dma/sun4i-dma.c:501: warning: Function parameter or member 'chan' not described in 'generate_ddma_promise' drivers/dma/sun4i-dma.c:501: warning: Function parameter or member 'src' not described in 'generate_ddma_promise' drivers/dma/sun4i-dma.c:501: warning: Function parameter or member 'dest' not described in 'generate_ddma_promise' drivers/dma/sun4i-dma.c:501: warning: Function parameter or member 'len' not described in 'generate_ddma_promise' drivers/dma/sun4i-dma.c:501: warning: Function parameter or member 'sconfig' not described in 'generate_ddma_promise' drivers/dma/sun4i-dma.c:577: warning: Function parameter or member 'contract' not described in 'get_next_cyclic_promise' drivers/dma/sun4i-dma.c:596: warning: Function parameter or member 'vd' not described in 'sun4i_dma_free_contract' Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Cc: Maxime Ripard <mripard@kernel.org> Cc: Chen-Yu Tsai <wens@csie.org> Cc: "Emilio López" <emilio@elopez.com.ar> Link: https://lore.kernel.org/r/20200714111546.1755231-10-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: at_hdmac: Repair parameter misspelling and demote non-kerneldoc ↵Lee Jones1-3/+3
headers Fixes the following W=1 kernel build warning(s): drivers/dma/at_hdmac.c:666: warning: Function parameter or member 'tx' not described in 'atc_tx_submit' drivers/dma/at_hdmac.c:666: warning: Excess function parameter 'desc' description in 'atc_tx_submit' drivers/dma/at_hdmac.c:1206: warning: Function parameter or member 'reg_width' not described in 'atc_dma_cyclic_check_values' drivers/dma/at_hdmac.c:1206: warning: Function parameter or member 'buf_addr' not described in 'atc_dma_cyclic_check_values' drivers/dma/at_hdmac.c:1206: warning: Function parameter or member 'period_len' not described in 'atc_dma_cyclic_check_values' drivers/dma/at_hdmac.c:1228: warning: Function parameter or member 'chan' not described in 'atc_dma_cyclic_fill_desc' drivers/dma/at_hdmac.c:1228: warning: Function parameter or member 'desc' not described in 'atc_dma_cyclic_fill_desc' drivers/dma/at_hdmac.c:1228: warning: Function parameter or member 'period_index' not described in 'atc_dma_cyclic_fill_desc' drivers/dma/at_hdmac.c:1228: warning: Function parameter or member 'buf_addr' not described in 'atc_dma_cyclic_fill_desc' drivers/dma/at_hdmac.c:1228: warning: Function parameter or member 'reg_width' not described in 'atc_dma_cyclic_fill_desc' drivers/dma/at_hdmac.c:1228: warning: Function parameter or member 'period_len' not described in 'atc_dma_cyclic_fill_desc' drivers/dma/at_hdmac.c:1228: warning: Function parameter or member 'direction' not described in 'atc_dma_cyclic_fill_desc' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Ludovic Desroches <ludovic.desroches@microchip.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Link: https://lore.kernel.org/r/20200714111546.1755231-9-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: altera-msgdma: Fix struct documentation blocksLee Jones1-2/+4
Fix some misspelling/description issues, demote non-kerneldoc header to standard comment block and provide a new description for msgdma_desc_config()'s 'stride' parameter. Fixes the following W=1 kernel build warning(s): drivers/dma/altera-msgdma.c:163: warning: Function parameter or member 'node' not described in 'msgdma_sw_desc' drivers/dma/altera-msgdma.c:163: warning: Function parameter or member 'tx_list' not described in 'msgdma_sw_desc' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'lock' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'dev' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'irq_tasklet' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'pending_list' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'free_list' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'active_list' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'done_list' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'desc_free_cnt' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'idle' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'dmadev' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'dmachan' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'hw_desq' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'sw_desq' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'npendings' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'slave_cfg' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'irq' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'csr' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'desc' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:197: warning: Function parameter or member 'resp' not described in 'msgdma_device' drivers/dma/altera-msgdma.c:265: warning: Function parameter or member 'stride' not described in 'msgdma_desc_config' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Stefan Roese <sr@denx.de> Link: https://lore.kernel.org/r/20200714111546.1755231-8-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: ste_dma40: Supply 2 missing struct attribute descriptionsLee Jones1-0/+2
Fixes the following W=1 kernel build warning(s): drivers/dma/ste_dma40.c:398: warning: Function parameter or member 'dma_addr' not described in 'd40_lcla_pool' drivers/dma/ste_dma40.c:601: warning: Function parameter or member 'dma_parms' not described in 'd40_base' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Jonas Aaberg <jonas.aberg@stericsson.com> Link: https://lore.kernel.org/r/20200714111546.1755231-7-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: pl330: Demote obvious misuse of kerneldoc to standard comment blockLee Jones1-1/+1
No 'struct' title is provided. Nor are any attribute descriptions. Fixes the following W=1 kernel build warning(s): drivers/dma/pl330.c:295: warning: cannot understand function prototype: 'struct pl330_reqcfg ' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Jaswinder Singh <jassi.brar@samsung.com> Link: https://lore.kernel.org/r/20200714111546.1755231-6-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: mmp_pdma: Demote obvious misuse of kerneldoc to standard comment ↵Lee Jones1-3/+3
blocks No attempt has been made to document any of the demoted functions here. Fixes the following W=1 kernel build warning(s): drivers/dma/mmp_pdma.c:298: warning: Function parameter or member 'chan' not described in 'start_pending_queue' drivers/dma/mmp_pdma.c:393: warning: Function parameter or member 'dchan' not described in 'mmp_pdma_alloc_chan_resources' drivers/dma/mmp_pdma.c:862: warning: Function parameter or member 'dchan' not described in 'mmp_pdma_issue_pending' Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20200714111546.1755231-5-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: ep93xx_dma: Provide some missing struct attribute documentationLee Jones1-0/+2
A couple of entries were missed, causing kerneldoc to complain. Fixes the following W=1 kernel build warning(s): drivers/dma/ep93xx_dma.c:183: warning: Function parameter or member 'slave_config' not described in 'ep93xx_dma_chan' drivers/dma/ep93xx_dma.c:215: warning: Function parameter or member 'hw_synchronize' not described in 'ep93xx_dma_engine' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Lennert Buytenhek <buytenh@wantstofly.org> Cc: Ryan Mallon <rmallon@gmail.com> Cc: Mika Westerberg <mika.westerberg@iki.fi> Link: https://lore.kernel.org/r/20200714111546.1755231-4-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: of-dma: Fix misspellings/formatting issues in some function headersLee Jones1-4/+4
Fixes the following W=1 kernel build warning(s): drivers/dma/of-dma.c:57: warning: Function parameter or member 'ofdma' not described in 'of_dma_router_xlate' drivers/dma/of-dma.c:57: warning: Excess function parameter 'of_dma' description in 'of_dma_router_xlate' drivers/dma/of-dma.c:107: warning: Function parameter or member 'data' not described in 'of_dma_controller_register' drivers/dma/of-dma.c:308: warning: Function parameter or member 'ofdma' not described in 'of_dma_simple_xlate' drivers/dma/of-dma.c:308: warning: Excess function parameter 'of_dma' description in 'of_dma_simple_xlate' drivers/dma/of-dma.c:338: warning: Function parameter or member 'ofdma' not described in 'of_dma_xlate_by_chan_id' drivers/dma/of-dma.c:338: warning: Excess function parameter 'of_dma' description in 'of_dma_xlate_by_chan_id' Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20200714111546.1755231-3-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: mediatek: mtk-hsdma: Fix formatting in 'struct mtk_hsdma_pdesc' ↵Lee Jones1-4/+4
doc block Struct attribute names must be an exact match or the kerneldoc checker gets confused. Fixes the following W=1 kernel build warning(s): drivers/dma/mediatek/mtk-hsdma.c:120: warning: Function parameter or member 'desc1' not described in 'mtk_hsdma_pdesc' drivers/dma/mediatek/mtk-hsdma.c:120: warning: Function parameter or member 'desc2' not described in 'mtk_hsdma_pdesc' drivers/dma/mediatek/mtk-hsdma.c:120: warning: Function parameter or member 'desc3' not described in 'mtk_hsdma_pdesc' drivers/dma/mediatek/mtk-hsdma.c:120: warning: Function parameter or member 'desc4' not described in 'mtk_hsdma_pdesc' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Sean Wang <sean.wang@mediatek.com> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: linux-mediatek@lists.infradead.org Link: https://lore.kernel.org/r/20200714111546.1755231-2-lee.jones@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: ti: k3-udma: Use struct_size() in kzalloc()Gustavo A. R. Silva1-2/+2
Make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes. This code was detected with the help of Coccinelle and, audited and fixed manually. Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Addresses-KSPP-ID: https://github.com/KSPP/linux/issues/83 Link: https://lore.kernel.org/r/20200619224334.GA7857@embeddedor Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: ti: k3-udma: Use udma_chan instead of tchan/rchan for IO functionsPeter Ujfalusi1-85/+78
Move the uc->tchan/rchan checks to the IO wrappers itself instead of calling the functions with tchan/rchan directly. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20200707102352.28773-6-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: ti: k3-udma-private: Use udma_read/write for register accessPeter Ujfalusi1-2/+6
Instead of using higher level wrappers (udma_rchanrt/tchanrt read/write), use the underlying register access functions directly. This will allow changes in the higher level wrappers within the DMAengine driver. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20200707102352.28773-5-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: ti: k3-udma: Use common defines for TCHANRT/RCHANRT registersPeter Ujfalusi3-139/+115
The register offsets and functions are the same among TCHAN and RCHAN. Use generic, common names for them. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20200707102352.28773-4-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: ti: k3-udma: Do not use ring_get_occ in udma_pop_from_ringPeter Ujfalusi1-15/+13
The ring_get_occ is redundant as the k3_ringacc_ring_pop() is also checking the occ of the ring. With removing the ring_get_occ, the function can be simplified as well. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20200707102352.28773-3-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: ti: k3-udma: Remove dma_sync_single calls for descriptorsPeter Ujfalusi1-35/+2
The descriptors are allocated via wither dma_pool or dma_alloc_coherent. There is no need for the dma_sync_singel_* calls. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20200707102352.28773-2-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: idxd: fix PCI_MSI build errorsRandy Dunlap1-0/+1
Fix build errors when CONFIG_PCI_MSI is not enabled by making the driver depend on PCI_MSI: ld: drivers/dma/idxd/device.o: in function `idxd_mask_msix_vector': device.c:(.text+0x26f): undefined reference to `pci_msi_mask_irq' ld: drivers/dma/idxd/device.o: in function `idxd_unmask_msix_vector': device.c:(.text+0x2af): undefined reference to `pci_msi_unmask_irq' Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Dave Jiang <dave.jiang@intel.com> Cc: dmaengine@vger.kernel.org Cc: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/9dee3f46-70d9-ea75-10cb-5527ab297d1d@infradead.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: pl330: Add quirk 'arm,pl330-periph-burst'Sugar Zhang1-1/+9
This patch adds the qurik to use burst transfers only for pl330 controller, even for request with a length of 1. Although, the correct way should be: if the peripheral request length is 1, the peripheral should use SINGLE request, and then notify the dmac using SINGLE mode by src/dst_maxburst with 1. For example, on the Rockchip SoCs, all the peripherals can use SINGLE or BURST request by setting GRF registers. it is possible that if these peripheral drivers are used only for Rockchip SoCs. Unfortunately, it's not, such as dw uart, which is used so widely, and we can't set src/dst_maxburst according to the SoCs' specific to compatible with all the other SoCs. So, for convenience, all the peripherals are set as BURST request by default on the Rockchip SoCs. even for request with a length of 1. the current pl330 driver will perform SINGLE transfer if the client's maxburst is 1, which still should be working according to chapter 2.6.6 of datasheet which describe how DMAC performs SINGLE transfers for a BURST request. Unfortunately, it's broken on the Rockchip SoCs, which support only matching transfers, such as BURST transfer for BURST request, SINGLE transfer for SINGLE request. Finally, we add the quirk to specify pl330 to use burst transfers only. Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Link: https://lore.kernel.org/r/1593439555-68130-5-git-send-email-sugar.zhang@rock-chips.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: pl330: Improve transfer efficiency for the dregsSugar Zhang1-11/+21
Only the unaligned burst transfers have the dregs. so, still use BURST transfer with a reduced size for better performance. Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Link: https://lore.kernel.org/r/1593439555-68130-3-git-send-email-sugar.zhang@rock-chips.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-15dmaengine: pl330: Remove the burst limit for quirk 'NO-FLUSHP'Sugar Zhang1-8/+2
There is no reason to limit the performance on the 'NO-FLUSHP' SoCs, because 'FLUSHP' instruction is broken on these platforms, so remove the limit to improve the efficiency. Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Link: https://lore.kernel.org/r/1593439555-68130-2-git-send-email-sugar.zhang@rock-chips.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13dmaengine: idxd: move idxd interrupt handling to mask instead of ignoreDave Jiang3-46/+13
Switch driver to use MSIX mask and unmask instead of the ignore bit. When ignore bit is cleared, we must issue an MMIO read to ensure writes have all arrived and check and process any additional completions. The ignore bit does not queue up any pending MSIX interrupts. The mask bit however does. Use API call from interrupt subsystem to mask MSIX interrupt since the hardware does not have convenient mask bit register. Suggested-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/159319517621.70410.11816465052708900506.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13dmaengine: idxd: add work queue drain supportDave Jiang6-132/+112
Add wq drain support. When a wq is being released, it needs to wait for all in-flight operation to complete. A device control function idxd_wq_drain() has been added to facilitate this. A wq drain call is added to the char dev on release to make sure all user operations are complete. A wq drain is also added before the wq is being disabled. A drain command can take an unpredictable period of time. Interrupt support for device commands is added to allow waiting on the command to finish. If a previous command is in progress, the new submitter can block until the current command is finished before proceeding. The interrupt based submission will submit the command and then wait until a command completion interrupt happens to complete. All commands are moved to the interrupt based command submission except for the device reset during probe, which will be polled. Fixes: 42d279f9137a ("dmaengine: idxd: add char driver to expose submission portal to userland") Signed-off-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Dan Williams <dan.j.williams@intel.com> Link: https://lore.kernel.org/r/159319502515.69593.13451647706946040301.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-06dmaengine: ioat setting ioat timeout as module parameterLeonid Ravich2-2/+12
DMA transaction time to completion is a function of PCI bandwidth, transaction size and a queue depth. So hard coded value for timeouts might be wrong for some scenarios. Signed-off-by: Leonid Ravich <Leonid.Ravich@emc.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20200701184816.29138-1-leonid.ravich@dell.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-06dmaengine: fsl-edma: fix wrong tcd endianness for big-endian cpuAngelo Dureghello1-12/+14
Due to recent fixes in m68k arch-specific I/O accessor macros, this driver is not working anymore for ColdFire. Fix wrong tcd endianness removing additional swaps, since edma_writex() functions should already take care of any eventual swap if needed. Note, i could only test the change in ColdFire mcf54415 and Vybrid vf50 / Colibri where i don't see any issue. So, every feedback and test for all other SoCs involved is really appreciated. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> Reported-by: kbuild test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20200701225205.1674463-1-angelo.dureghello@timesys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-06dmaengine: dmatest: stop completed threads when running without set channelPeter Ujfalusi1-0/+2
The completed threads were not cleared and consequent run would result threads accumulating: echo 800000 > /sys/module/dmatest/parameters/test_buf_size echo 2000 > /sys/module/dmatest/parameters/timeout echo 50 > /sys/module/dmatest/parameters/iterations echo 1 > /sys/module/dmatest/parameters/max_channels echo "" > /sys/module/dmatest/parameters/channel [ 237.507265] dmatest: Added 1 threads using dma1chan2 echo 1 > /sys/module/dmatest/parameters/run [ 244.713360] dmatest: Started 1 threads using dma1chan2 [ 246.117680] dmatest: dma1chan2-copy0: summary 50 tests, 0 failures 2437.47 iops 977623 KB/s (0) echo 1 > /sys/module/dmatest/parameters/run [ 292.381471] dmatest: No channels configured, continue with any [ 292.389307] dmatest: Added 1 threads using dma1chan3 [ 292.394302] dmatest: Started 1 threads using dma1chan2 [ 292.399454] dmatest: Started 1 threads using dma1chan3 [ 293.800835] dmatest: dma1chan3-copy0: summary 50 tests, 0 failures 2624.53 iops 975014 KB/s (0) echo 1 > /sys/module/dmatest/parameters/run [ 307.301429] dmatest: No channels configured, continue with any [ 307.309212] dmatest: Added 1 threads using dma1chan4 [ 307.314197] dmatest: Started 1 threads using dma1chan2 [ 307.319343] dmatest: Started 1 threads using dma1chan3 [ 307.324492] dmatest: Started 1 threads using dma1chan4 [ 308.730773] dmatest: dma1chan4-copy0: summary 50 tests, 0 failures 2390.28 iops 965436 KB/s (0) Fixes: 6b41030fdc79 ("dmaengine: dmatest: Restore default for channel") Reported-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20200701101225.8607-1-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-06dmaengine: fsl-edma-common: correct DSIZE_32BYTERobin Gong1-1/+1
Correct EDMA_TCD_ATTR_DSIZE_32BYTE define since it's broken by the below: '0x0005 --> BIT(3) | BIT(0))' Fixes: 4d6d3a90e4ac ("dmaengine: fsl-edma: fix macros") Signed-off-by: Robin Gong <yibin.gong@nxp.com> Tested-by: Angelo Dureghello <angelo@sysam.it> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/1593449998-32091-1-git-send-email-yibin.gong@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-06dmaengine: dw: Initialize channel before each transferAndy Shevchenko1-12/+0
In some cases DMA can be used only with a consumer which does runtime power management and on the platforms, that have DMA auto power gating logic (see comments in the drivers/acpi/acpi_lpss.c), may result in DMA losing its context. Simple mitigation of this issue is to initialize channel each time the consumer initiates a transfer. Fixes: cfdf5b6cc598 ("dw_dmac: add support for Lynxpoint DMA controllers") Reported-by: Tsuchiya Yuto <kitakar@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=206403 Link: https://lore.kernel.org/r/20200705115620.51929-1-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-02dmaengine: idxd: fix misc interrupt handler thread unmaskingDave Jiang1-1/+2
Fix unmasking of misc interrupt handler when completing normal. It exits early and skips the unmasking with the current implementation. Fix to unmask interrupt when exiting normally. Fixes: bfe1d56091c1 ("dmaengine: idxd: Init and probe for Intel data accelerators") Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/159311256528.855.11527922406329728512.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-02dmaengine: idxd: cleanup workqueue config after disablingDave Jiang3-0/+31
After disabling a device, we should clean up the internal state for the wqs and zero out the configuration registers. Without doing so can cause issues when the user reprogram the wqs. Fixes: c52ca478233c ("dmaengine: idxd: add configuration component of driver") Reported-by: Yixin Zhang <yixin.zhang@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Tested-by: Yixin Zhang <yixin.zhang@intel.com> Link: https://lore.kernel.org/r/159311264246.1198.11955791213681679428.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>