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2013-10-25dmaengine: ste: use DMA_COMPLETE for dma completion statusVinod Koul1-1/+1
Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-10-07DMA: ste_dma40: use a power of 2 checkGuennadi Liakhovetski1-2/+3
dst_addr_width and src_addr_width should be a power of 2. Currently the driver checks, that they both lie between 1 and 8 and that they are equal to 1 or even. This however leaves an invalid value of 6 uncaught. Use an explicit power of 2 check instead. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> [typo fix on changelog] Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-09-02dma: ste_dma40: Fix potential null pointer dereferenceSachin Kamat1-0/+3
kcalloc can return NULL. Check the pointer before dereferencing. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-09-02dma: ste_dma40: Remove duplicate constSachin Kamat1-1/+1
'const' was added twice. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-25dmaengine: ste_dma40: off by one in d40_of_probe()Dan Carpenter1-1/+1
If "num_disabled" is equal to STEDMA40_MAX_PHYS (32) then we would write one space beyond the end of the pdata->disable_channels[] array. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-25dma: ste_dma: Fix warning when CONFIG_ARM_LPAE=yFabio Estevam1-7/+5
When CONFIG_ARM_LPAE=y the following build warning are generated: drivers/dma/ste_dma40.c:3228:2: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'resource_size_t' [-Wformat] drivers/dma/ste_dma40.c:3582:3: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'resource_size_t' [-Wformat] drivers/dma/ste_dma40.c:3582:3: warning: format '%x' expects argument of type 'unsigned int', but argument 5 has type 'resource_size_t' [-Wformat] drivers/dma/ste_dma40.c:3593:5: warning: format '%x' expects argument of type 'unsigned int', but argument 5 has type 'resource_size_t' [-Wformat] According to Documentation/printk-formats.txt '%pa' can be used to properly print 'resource_size_t'. Also, for printing memory region the '%pr' is more convenient. Reported-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Kevin Hilman <khilman@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-08-13dma: use dev_get_platdata()Jingoo Han1-2/+2
Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-06-25Merge tag 'ux500-dma40-for-arm-soc-3' of ↵Olof Johansson1-9/+9
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers From Linus Walleij: DMA40 fixes for earlier submitted driver patches: - Fix various error path and sparse bugs in the DMA40 driver - Fix various compile errors in the ux500 crypto driver (dependent on the DMA40 changes). * tag 'ux500-dma40-for-arm-soc-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: crypto: ux500: use dmaengine_submit API crypto: ux500: use dmaengine_prep_slave_sg API crypto: ux500: use dmaengine_device_control API crypto: ux500/crypt: add missing __iomem qualifiers crypto: ux500/hash: add missing static qualifiers crypto: ux500/hash: use readl on iomem addresses dmaengine: ste_dma40: Declare memcpy config as static dmaengine: ste_dma40: fix error return code in d40_probe() Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-24dmaengine: ste_dma40: Declare memcpy config as staticFabio Baltieri1-2/+2
Fix sparse warnings: drivers/dma/ste_dma40.c:81:26: warning: symbol 'dma40_memcpy_conf_phy' was not declared. Should it be static? drivers/dma/ste_dma40.c:95:26: warning: symbol 'dma40_memcpy_conf_log' was not declared. Should it be static? Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-14Merge tag 'ux500-dma40-for-arm-soc-2' of ↵Olof Johansson1-84/+115
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers From Linus Walleij: Second set of DMA40 changes: refactorings and device tree support for the DMA40. Now with MUSB and some platform data removal. * tag 'ux500-dma40-for-arm-soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: dmaengine: ste_dma40: Fetch disabled channels from DT dmaengine: ste_dma40: Fetch the number of physical channels from DT ARM: ux500: Stop passing DMA platform data though AUXDATA dmaengine: ste_dma40: Allow memcpy channels to be configured from DT dmaengine: ste_dma40_ll: Replace meaningless register set with comment dmaengine: ste_dma40: Convert data_width from register bit format to value dmaengine: ste_dma40_ll: Use the BIT macro to replace ugly '(1 << x)'s ARM: ux500: Remove recently unused stedma40_xfer_dir enums dmaengine: ste_dma40: Replace ST-E's home-brew DMA direction defs with generic ones ARM: ux500: Replace ST-E's home-brew DMA direction definition with the generic one dmaengine: ste_dma40: Use the BIT macro to replace ugly '(1 << x)'s ARM: ux500: Remove empty function u8500_of_init_devices() ARM: ux500: Remove ux500-musb platform registation when booting with DT usb: musb: ux500: add device tree probing support usb: musb: ux500: attempt to find channels by name before using pdata usb: musb: ux500: harden checks for platform data usb: musb: ux500: take the dma_mask from coherent_dma_mask usb: musb: ux500: move the MUSB HDRC configuration into the driver usb: musb: ux500: move channel number knowledge into the driver
2013-06-12Merge tag 's3c24xx-driver-1' of ↵Olof Johansson1-3/+5
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers From Kukjin Kim, driver updats for s3c24xx: - move cpufreq driver into drivers/ - add pinctrl-s3c24xx driver - cleanup OF in gpio driver Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-04dmaengine: ste_dma40: fix error return code in d40_probe()Wei Yongjun1-7/+7
In many of the error handling case, the return value 'ret' not set and 0 will be return from d40_probe() even if error, but we should return a negative error code instead in those error handling case. This patch fixed them, and also removed useless variable 'err'. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-04dmaengine: ste_dma40: Fetch disabled channels from DTLee Jones1-1/+16
Some platforms have channels which are not available for normal use. This information is currently passed though platform data in internal BSP kernels. Once those platforms land, they'll need to configure them appropriately, so we may as well add the infrastructure. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-04dmaengine: ste_dma40: Fetch the number of physical channels from DTLee Jones1-1/+6
Some platforms insist on obscure physical channel availability. This information is currently passed though platform data in internal BSP kernels. Once those platforms land, they'll need to configure them appropriately, so we may as well add the infrastructure. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-04dmaengine: ste_dma40: Allow memcpy channels to be configured from DTLee Jones1-8/+32
At this moment in time the memcpy channels which can be used by the D40 are fixed, as each supported platform in Mainline uses the same ones. However, platforms do exist which don't follow this convention, so these will need to be tailored. Fortunately, these platforms will be DT only, so this change has very little impact on platform data. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-04dmaengine: ste_dma40: Convert data_width from register bit format to valueLee Jones1-38/+25
When a DMA client requests and configures a DMA channel, it requests data_width in Bytes. The DMA40 driver then swiftly converts it over to the necessary register bit value. Unfortunately, for any subsequent calculations we have to shift '1' by the bit pattern (1 << data_width) times to make any sense of it. This patch flips the semantics on its head and only converts the value to its respective register bit pattern when writing to registers. This way we can use the true data_width (in Bytes) value. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-04dmaengine: ste_dma40: Replace ST-E's home-brew DMA direction defs with ↵Lee Jones1-28/+28
generic ones STEDMA40_*_TO_* direction definitions are identical in all but name to the pre-defined generic DMA_*_TO_* ones. Let's make things easy by not duplicating such things. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-04dmaengine: ste_dma40: Use the BIT macro to replace ugly '(1 << x)'sLee Jones1-10/+10
The aim is to make the code that little more readable. Acked-by: Vinod Koul <vnod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-27dmaengine: ste_dma40: fix pm runtime ref countingRabin Vincent1-3/+5
The pm runtime reference counting of the driver is broken for the case when there is more than one transfer queued, leading to the device being runtime suspend while active. Fix it. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-05-23dmaengine: ste_dma40: Remove redundant address fetching functionLee Jones1-18/+0
Addresses are now stored in local data structures and are easy to obtain, thus a specialist function used to fetch them is now surplus to requirement. Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Only use addresses passed as configuration informationLee Jones1-40/+11
Addresses are passed in from the client's driver via the invocation of dmaengine_slave_config(), so there's no need to fetch them from platform data too, hardwired or otherwise. This is a great step forward, as it elevates a large burden from platform data in the way of a look-up table. Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Don't configure runtime configurable setup during allocateLee Jones1-3/+3
Using the dmaengine API for slave transfers, allocating and configuring a channel are two separate actions. Here we're removing logical channel configuration from the channel allocation routine for slave transfers, as the same config is already done in the runtime config function, and put the corresponding call into d40_config_memcpy() for the memcpy code path. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> [Edited the commit message] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Remove unnecessary call to d40_phy_cfg()Lee Jones1-5/+9
The majority of configuration done in d40_phy_config() pertains to physical channels. Move the call over to runtime config which has different code paths for physical and logical channels already, and make it an exclusive physical channel config function as the name implies, and drop the is_log argument. Since we moved the call to runtime_config() it only gets called for device transfers, so encode the small snippet of configuration pertaining to memcpy channels into the d40_config_memcpy() function. Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> [rewrote the commit message] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Separate Logical Global Interrupt Mask (GIM) unmaskingLee Jones1-0/+4
During the initial setup of a logical channel, it is necessary to unmask the GIM in order to receive generated terminal count and error interrupts. We're separating out this required code so it will be possible to move the remaining code in d40_phy_cfg(), which is mostly runtime configuration into the runtime_config() routine. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Supply full Device Tree parsing supportLee Jones1-0/+52
Using the new DMA DT bindings and API, we can register the DMA40 driver as Device Tree capable. Now, when a client attempts to allocate a channel using the DMA DT bindings via its own node, we are able to parse the request and allocate a channel in the correct manner. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Cc: Rob Herring <rob.herring@calxeda.com> Cc: devicetree-discuss@lists.ozlabs.org Acked-by: Vinod Koul <vinod.koul@intel.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Allow driver to be probe()able when DT is enabledLee Jones1-2/+44
When booting using Device Tree, devices aren't registered in the normal way. Instead, they need to be provided with a compatible string which is held in an OF Match Table for comparison during start-up. Here we provide the compatible string and prepare the driver to not receive a platform data pointer. Acked-by: Vinod Koul <vnod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> [Fixed up whitespace error] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Allocate plat_data on declarationLee Jones1-3/+1
It's the way that most other drivers do it. Very trivial clean-up which reduces line count and simplifies code. Acked-by: Vinod Koul <vnod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Also report the number of logical channelsLee Jones1-2/+3
Now we know the total of physical and logical channels, we may as well report them within the information log. Before: dma40 dma40.0: hardware revision: 3 @ 0x801c0000 with 8 physical channels After: <as above ...> and 256 logical channels Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Move rev error-check up to revision acquisitionLee Jones1-6/+4
At the moment we fetch the hardware revision, then do some stuff, then check whether the revision is correct and return in error if it's not. Well we may as well check it as soon as we know what it is, so let's move the check right up underneath where we acquire the version. Acked-by: Vinod Koul <vnod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Remove 'always true' checkingLee Jones1-11/+5
Before allocating memory for logical channels, the current driver checks to see if there are any. Well as the dma40_memcpy_channels[] array is always populated, the check is always true. Best to remove the check. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Calculate number of logical channels from physical onesLee Jones1-10/+6
This change will cost ~25KB of memory, but it's worth the trade-off, as it removes a great deal of overhead. It means that instead of only allocating memory for the logical channels in use, it does so for all available ones, which is 32 per physical channel. However, this now means we can remove some platform data and we don't have to worry about adding vendor specific variables to Device Tree. Acked-by: Vinod Koul <vnod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Remove home-brew MAX() macroLee Jones1-3/+4
The current implementation of the DMA40's local MAX() macro evaluates its arguments more times than is necessary and it not type checked. This patch strips replaces it with a new, more efficient constant. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Reported-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Amalgamate DMA source and destination channel numbersLee Jones1-62/+31
Devices which utilise DMA use the same device numbers for transmitting and receiving. In this patch we encode the source and destination information into one single attribute. We can subsequently exploit the direction attribute to see which of the transfer directions are being described. This also lessens the burden on platform data. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Rectify incorrect configuration validation checkingLee Jones1-4/+4
If we compare an event's group (dev_type / 16) with STEDMA40_DEV_DST_MEMORY (-1), the only way we'd obtain a positive result is if we passed -16 as a device type, which is unfeasible. Instead, it would be much more sane to compare STEDMA40_DEV_DST_MEMORY against the raw dev_type in order to expect the expected result. Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Move default memcpy configs into the driverLee Jones1-2/+30
There are only two default memcpy configurations used for the DMA40 driver; one for physical memcpy and one for logical memcpy. Instead of invariably passing the same configurations though platform data, we're moving them into the driver instead. Acked-by: Vinod Koul <vnod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Fix up static memcpy event linesLinus Walleij1-1/+15
The commit "dmaengine: ste_dma40: Assign memcpy channels in the driver" had two problems: - It assigned magic numbers to the memcpy event lines instead of giving them symbolic names. - It seems to have missed one of the memcpy event lines, number 51. This patch fixes it up. Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23dmaengine: ste_dma40: Assign memcpy channels in the driverLee Jones1-5/+7
The channels reserved for memcpy are the same for all currently supported platforms. With this in mind, we can ease the platform data passing requirement by moving these assignments out from platform code and place them directly into the driver. Acked-by: Vinod Koul <vnod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-14dmaengine: ste_dma40: do not remove descriptors for cyclic transfersFabio Baltieri1-3/+3
Fix dma_tc_handle() to call d40_desc_remove() and d40_desc_done() only for non-cyclic transfers, as this was breaking ux500_pcm since introduced in: d49278e dmaengine: dma40: Add support to split up large elements Reported-by: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-21Merge tag 'ux500-dma40' of //git.linaro.org/people/fabiobaltieri/linux.gitVinod Koul1-126/+363
Pull ste_dma40 fixes from Fabio Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-01-14dmaengine: set_dma40: balance clock in probe fail codeFabio Baltieri1-1/+1
Clock code was changed to use clk_prepare_enable in: b707c65 dma/ste_dma40: Fixup clock usage during probe but clk_disable on probe fail path was not updated. This patch fix this by using clk_disable_unprepare in place of clk_disable. Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: set_dma40: ignore spurious interruptsFabio Baltieri1-3/+12
Some DMA channels may be used by other cores in the SoC. This patch modifies the dma interrupt handler to ignore interrupts from unknown channels. Cc: Rabin Vincent <rabin.vincent@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: add software lli supportFabio Baltieri1-1/+19
This patch add support to manage LLI by SW for select phy channels. There is a HW issue in certain controllers due to which on certain occassions HW LLI cannot be used on some physical channels. To avoid the HW issue on a specific phy channel, the phy channel number can be added to the list of soft_lli_channels and there after all the transfers on that channel will use software LLI, for peripheral to memory transfers. SoftLLI introduces relink overhead, that could impact performace for certain use cases. This is based on a previous patch of Narayanan Gopalakrishnan. Cc: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: minor code readability fixesFabio Baltieri1-9/+8
Use internal variables to the cycles to improve code readability, no functional changes. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: minor cosmetic fixesFabio Baltieri1-21/+12
This patch contains various non functional cosmetic fixes. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: add a done queue for completed descriptorsFabio Baltieri1-4/+33
This is to keep the active queue for only those transfers which are actually active in the hardware. Descriptors will be moved to the done queue after they are completed in the hardware (interrupt handler) but before all the cleanup work has been completed (tasklet). Mostly based on a previous patch by Rabin Vincent. Cc: Rabin Vincent <rabin.vincent@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: support more than 128 event linesTong Liu1-78/+228
U8540 DMA controller is different from u9540 we need define new registers and use them to support handling more than 128 event lines. Signed-off-by: Tong Liu <tong.liu@stericsson.com> Reviewed-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: physical channels number correctionGerald Baeza1-5/+10
DMAC_ICFG[0:2]=SCHNB only allows to count 'multiple of 4' physical channels so it was ok with platforms having 8 channels but cannot be used for next versions (with 10 or 14 channels). This patch allows to provide the number of physical channels for a DMA device via platform_data, or still rely on SCHNB if platform_data announces 0 channel. Signed-off-by: Gerald Baeza <gerald.baeza@stericsson.com> Reviewed-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: support fixed physical channel allocationGerald Baeza1-2/+11
This patch makes existing use_fixed_channel field (of stedma40_chan_cfg structure) applicable to physical channels. Signed-off-by: Gerald Baeza <gerald.baeza@stericsson.com> Tested-by: Yannick Fertre <yannick.fertre@stericsson.com> Reviewed-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: don't allow high priority dest event linesRabin Vincent1-1/+14
Hardware bug: when a logical channel is triggerred by a high priority destination event line, an extra packet transaction is generated in case of important data write response latency on previous logical channel A and if the source transfer of current logical channel B is already completed and if no other channel with a higher priority than B is waiting for execution. Software workaround: do not set the high priority level for the destination event lines that trigger logical channels. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Reviewed-by: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
2013-01-14dmaengine: ste_dma40: don't check for pm_runtime_suspended()Narayanan G1-2/+0
The check for runtime suspend is not needed during a regular suspend, as the framework takes care of this. This fixes the issue of DMA driver not letting the system to go to deepsleep in the first attempt. Signed-off-by: Narayanan G <narayanan.gopalakrishnan@stericsson.com> Reviewed-by: Rabin Vincent <rabin.vincent@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-15 00:59:46 +0000