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path:
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drivers
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cxl
Age
Commit message (
Expand
)
Author
Files
Lines
2021-06-15
cxl/core: Add cxl-bus driver infrastructure
Dan Williams
2
-0
/
+95
2021-06-14
cxl/pci: Add media provisioning required commands
Ben Widawsky
1
-0
/
+19
2021-06-12
cxl/component_regs: Fix offset
Ben Widawsky
1
-1
/
+1
2021-06-12
cxl/hdm: Fix decoder count calculation
Ben Widawsky
2
-1
/
+8
2021-06-09
cxl/acpi: Introduce cxl_decoder objects
Dan Williams
3
-1
/
+347
2021-06-09
cxl/acpi: Enumerate host bridge root ports
Dan Williams
1
-1
/
+92
2021-06-09
cxl/acpi: Add downstream port data to cxl_port instances
Dan Williams
3
-4
/
+167
2021-06-09
cxl/Kconfig: Default drivers to CONFIG_CXL_BUS
Dan Williams
1
-0
/
+2
2021-06-09
cxl/acpi: Introduce the root of a cxl_port topology
Dan Williams
5
-0
/
+247
2021-06-05
cxl/pci: Fixup devm_cxl_iomap_block() to take a 'struct device *'
Dan Williams
1
-7
/
+8
2021-06-05
cxl/pci: Add HDM decoder capabilities
Ben Widawsky
3
-6
/
+166
2021-06-05
cxl/pci: Reserve individual register block regions
Ira Weiny
2
-4
/
+34
2021-06-05
cxl/pci: Map registers based on capabilities
Ira Weiny
3
-38
/
+180
2021-06-05
cxl/pci: Reserve all device regions at once
Ira Weiny
1
-7
/
+11
2021-06-05
cxl/pci: Introduce cxl_decode_register_block()
Ira Weiny
1
-8
/
+18
2021-05-26
cxl/mem: Get rid of @cxlm.base
Ben Widawsky
2
-15
/
+11
2021-05-26
cxl/mem: Move register locator logic into reg setup
Ben Widawsky
1
-67
/
+68
2021-05-26
cxl/mem: Split creation from mapping in probe
Ben Widawsky
1
-24
/
+40
2021-05-26
cxl/mem: Use dev instead of pdev->dev
Ben Widawsky
1
-1
/
+1
2021-05-26
cxl/mem: Demarcate vendor specific capability IDs
Ben Widawsky
1
-1
/
+4
2021-05-26
cxl/pci.c: Add a 'label_storage_size' attribute to the memdev
Vishal Verma
2
-0
/
+15
2021-05-26
cxl: Rename mem to pci
Ben Widawsky
3
-16
/
+10
2021-05-14
cxl/core: Refactor CXL register lookup for bridge reuse
Dan Williams
3
-44
/
+66
2021-05-14
cxl/core: Rename bus.c to core.c
Dan Williams
2
-9
/
+10
2021-05-14
cxl/mem: Introduce 'struct cxl_regs' for "composable" CXL devices
Dan Williams
3
-28
/
+61
2021-05-14
cxl/mem: Move some definitions to mem.h
Dan Williams
3
-77
/
+82
2021-04-16
cxl/mem: Fix memory device capacity probing
Dan Williams
1
-2
/
+5
2021-04-15
cxl/mem: Fix register block offset calculation
Ben Widawsky
1
-1
/
+1
2021-04-06
cxl/mem: Force array size of mem_commands[] to CXL_MEM_COMMAND_ID_MAX
Robert Richter
1
-1
/
+1
2021-04-06
cxl/mem: Disable cxl device power management
Dan Williams
1
-0
/
+1
2021-04-06
cxl/mem: Do not rely on device_add() side effects for dev_set_name() failures
Dan Williams
1
-10
/
+29
2021-04-06
cxl/mem: Fix synchronization mechanism for device removal vs ioctl operations
Dan Williams
1
-47
/
+50
2021-04-06
cxl/mem: Use sysfs_emit() for attribute show routines
Dan Williams
1
-4
/
+4
2021-02-22
cxl/mem: Fix potential memory leak
Ben Widawsky
1
-1
/
+3
2021-02-19
cxl/mem: Return -EFAULT if copy_to_user() fails
Dan Carpenter
1
-1
/
+4
2021-02-16
cxl/mem: Add set of informational commands
Ben Widawsky
1
-0
/
+9
2021-02-16
cxl/mem: Enable commands via CEL
Ben Widawsky
2
-7
/
+218
2021-02-16
cxl/mem: Add a "RAW" send command
Ben Widawsky
2
-0
/
+150
2021-02-16
cxl/mem: Add basic IOCTL interface
Ben Widawsky
1
-1
/
+282
2021-02-16
cxl/mem: Register CXL memX devices
Dan Williams
4
-2
/
+318
2021-02-16
cxl/mem: Find device capabilities
Ben Widawsky
3
-2
/
+679
2021-02-16
cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints
Dan Williams
4
-0
/
+118
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