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2020-04-03crypto: hisilicon - Fix build errorYueHaibing1-0/+2
When UACCE is m, CRYPTO_DEV_HISI_QM cannot be built-in. But CRYPTO_DEV_HISI_QM is selected by CRYPTO_DEV_HISI_SEC2 and CRYPTO_DEV_HISI_HPRE unconditionally, which may leads this: drivers/crypto/hisilicon/qm.o: In function 'qm_alloc_uacce': drivers/crypto/hisilicon/qm.c:1579: undefined reference to 'uacce_alloc' Add Kconfig dependency to enforce usable configurations. Fixes: 47c16b449921 ("crypto: hisilicon - qm depends on UACCE") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-03-20crypto: hisilicon/sec2 - Add new create qp processKai Ye3-61/+42
Combine found device and created qp into one operation instead of found device and create qp both are independent operations. when execute multiple tasks, the different threads may find same device at the same time, but the number of queues is insufficient on the device. causing one of threads fail to create a qp. Now fix this, First find device then create qp, if result failure. the current thread will find next device. Signed-off-by: Kai Ye <yekai13@huawei.com> Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com> Reviewed-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-03-20crypto: hisilicon/hpre - Optimize finding hpre device processHui Tang3-55/+20
Optimize finding hpre device process according to priority of numa distance. Signed-off-by: Hui Tang <tanghui20@huawei.com> Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com> Reviewed-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-03-20crypto: hisilicon/zip - Use hisi_qm_alloc_qps_node() when init ctxShukun Tan3-114/+34
Encapsulate hisi_qm_alloc_qps_node() to new interface to replace find_zip_device(), which will fix the bug of creating QP failure especially in multi-thread scenario. Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com> Reviewed-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-03-20crypto: hisilicon/qm - Put device finding logic into QMWeili Qian2-0/+156
Use struct hisi_qm to maintain device list. Meanwhile, add two external interface into qm, merge find proper device and create qp into QP alloc logic, merge release qps into QP free logic. Signed-off-by: Weili Qian <qianweili@huawei.com> Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com> Reviewed-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-03-12crypto: hisilicon/sec2 - Add pbuffer mode for SEC driverLongfang Liu2-5/+172
In the scenario of SMMU translation, the SEC performance of short messages (<512Bytes) cannot meet our expectations. To avoid this, we reserve the plat buffer (PBUF) memory for small packets when creating TFM. Signed-off-by: Longfang Liu <liulongfang@huawei.com> Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-03-12crypto: hisilicon/sec2 - Update IV and MAC operationLongfang Liu2-32/+43
We have updated the operation method of IV and MAC address to prepare for pbuf patch and fixed coding style. Signed-off-by: Longfang Liu <liulongfang@huawei.com> Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-03-12crypto: hisilicon/sec2 - Add iommu status checkLongfang Liu2-0/+20
In order to improve performance of small packets (<512Bytes) in SMMU translation scenario, we need to identify the type of IOMMU in the SEC probe to process small packets by a different method. Signed-off-by: Longfang Liu <liulongfang@huawei.com> Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-03-12crypto: hisilicon/sec2 - Add workqueue for SEC driver.Ye Kai1-3/+29
Allocate one workqueue for each QM instead of one for all QMs, we found the throughput of SEC engine can be increased to the hardware limit throughput during testing sec2 performance. so we added this scheme. Signed-off-by: Ye Kai <yekai13@huawei.com> Signed-off-by: Longfang Liu <liulongfang@huawei.com> Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-03-12crypto: hisilicon - Use one workqueue per qm instead of per qpShukun Tan2-25/+19
Since SEC need not so many workqueues as our test, we just use one workqueue created by the device driver of QM if necessary, which will also reduce CPU waste without any throughput decreasing. Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-03-06crypto: hisilicon - qm depends on UACCEHongbo Yao1-0/+2
If UACCE=m and CRYPTO_DEV_HISI_QM=y, the following error is seen while building qm.o: drivers/crypto/hisilicon/qm.o: In function `hisi_qm_init': (.text+0x23c6): undefined reference to `uacce_alloc' (.text+0x2474): undefined reference to `uacce_remove' (.text+0x286b): undefined reference to `uacce_remove' drivers/crypto/hisilicon/qm.o: In function `hisi_qm_uninit': (.text+0x2918): undefined reference to `uacce_remove' make[1]: *** [vmlinux] Error 1 make: *** [autoksyms_recursive] Error 2 This patch fixes the config dependency for QM and ZIP. reported-by: Hulk Robot <hulkci@huawei.com> Suggested-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Hongbo Yao <yaohongbo@huawei.com> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-02-28crypto: hisilicon - remove redundant assignment of pointer ctxColin Ian King1-1/+0
Pointer ctx is being re-assigned with the same value as it was initialized with. The second assignment is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-02-22crypto: hisilicon - register zip engine to uacceZhangfei Gao3-8/+260
Register qm to uacce framework for user crypto driver Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-02-22crypto: hisilicon - Remove module_param uacce_modeZhangfei Gao1-25/+6
Remove the module_param uacce_mode, which is not used currently. Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-02-13crypto: hisilicon - Fix duplicate print when qm occur multiple errorsShukun Tan1-31/+28
If all possible errors occurs at the same time, the error_status will be all 1s. The doorbell timeout error and FIFO overflow error will be print in each cycle, which should be print just once. Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-02-13crypto: hisilicon - Unify error detect process into qmShukun Tan5-244/+185
In error detect process, a lot of duplicate code can put into qm. We add two callback(get_dev_hw_err_status and log_dev_hw_err) into struct hisi_qm_err_ini to handle device error detect, meanwhile the qm error detect not changed. Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-02-13crypto: hisilicon - Configure zip RAS error typeShukun Tan1-0/+10
Configure zip RAS error type in error handle initialization, Where ECC 1bit is configured as CE error, others are NFE. Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-02-13crypto: hisilicon - Unify hardware error init/uninit into QMShukun Tan5-99/+149
The initialization and uninitialization of zip/hpre/sec/qm hardware error is processed in respective drivers, which could be unified into qm.c. We add struct hisi_qm_err_ini into struct hisi_qm, which involve all error handlers of device and assignment should be done in driver probe. Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-22crypto: hisilicon - fix spelling mistake "disgest" -> "digest"Colin Ian King1-1/+1
There is a spelling mistake in an error message. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16crypto: hisilicon - add branch prediction macroZaibo Xu1-22/+22
This branch prediction macro on the hot path can improve small performance(about 2%) according to the test. Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16crypto: hisilicon - adjust hpre_crt_para_getZaibo Xu1-14/+14
Reorder the input parameters of hpre_crt_para_get to make it cleaner. Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16crypto: hisilicon - Fixed some tiny bugs of HPREZaibo Xu2-38/+32
1.Use memzero_explicit to clear key; 2.Fix some little endian writings; 3.Fix some other bugs and stuff of code style; Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16crypto: hisilicon - Bugfixed tfm leakZaibo Xu2-13/+18
1.Fixed the bug of software tfm leakage. 2.Update HW error log message. Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16crypto: hisilicon - Add aead support on SEC2Zaibo Xu4-24/+620
authenc(hmac(sha1),cbc(aes)), authenc(hmac(sha256),cbc(aes)), and authenc(hmac(sha512),cbc(aes)) support are added for SEC v2. Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16crypto: hisilicon - redefine skcipher initiationZaibo Xu1-35/+61
1.Define base initiation of QP for context which can be reused. 2.Define cipher initiation for other algorithms. Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16crypto: hisilicon - Add branch prediction macroZaibo Xu1-14/+14
After adding branch prediction for skcipher hot path, a little bit income of performance is gotten. Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16crypto: hisilicon - Add callback error checkZaibo Xu2-6/+10
Add error type parameter for call back checking inside. Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16crypto: hisilicon - Adjust some inner logicZaibo Xu1-26/+28
1.Adjust call back function. 2.Adjust parameter checking function. Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16crypto: hisilicon - Update QP resources of SEC V2Zaibo Xu3-93/+59
1.Put resource including request and resource list into QP context structure to avoid allocate memory repeatedly. 2.Add max context queue number to void kcalloc large memory for QP context. 3.Remove the resource allocation operation. 4.Redefine resource allocation APIs to be shared by other algorithms. 5.Move resource allocation and free inner functions out of operations 'struct sec_req_op', and they are called directly. Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16crypto: hisilicon - Update some names on SEC V2Zaibo Xu2-29/+36
1.Adjust dma map function to be reused by AEAD algorithms; 2.Update some names of internal functions and variables to support AEAD algorithms; 3.Rename 'sec_skcipher_exit' as 'sec_skcipher_uninit'; 4.Rename 'sec_get/put_queue_id' as 'sec_alloc/free_queue_id'; Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16crypto: hisilicon - fix print/comment of SEC V2Zaibo Xu2-6/+6
Fixed some print, coding style and comments of HiSilicon SEC V2. Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16crypto: hisilicon - Update debugfs usage of SEC V2Zaibo Xu3-14/+14
Applied some advices of Marco Elver on atomic usage of Debugfs, which is carried out by basing on Arnd Bergmann's fixing patch. Reported-by: Arnd Bergmann <arnd@arndb.de> Reported-by: Marco Elver <elver@google.com> Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Herbert Xu3-11/+21
Merge crypto tree to pick up hisilicon patch.
2020-01-09crypto: hisilicon/sec2 - Use atomics instead of __syncArnd Bergmann3-11/+21
The use of __sync functions for atomic memory access is not supported in the kernel, and can result in a link error depending on configuration: ERROR: "__tsan_atomic32_compare_exchange_strong" [drivers/crypto/hisilicon/sec2/hisi_sec2.ko] undefined! ERROR: "__tsan_atomic64_fetch_add" [drivers/crypto/hisilicon/sec2/hisi_sec2.ko] undefined! Use the kernel's own atomic interfaces instead. This way the debugfs interface actually reads the counter atomically. Fixes: 416d82204df4 ("crypto: hisilicon - add HiSilicon SEC V2 driver") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-12-20crypto: hisilicon - still no need to check return value of debugfs_create ↵Greg Kroah-Hartman1-22/+6
functions Just like in 4a97bfc79619 ("crypto: hisilicon - no need to check return value of debugfs_create functions"), there still is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this. Cc: Zhou Wang <wangzhou1@hisilicon.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "David S. Miller" <davem@davemloft.net> Cc: linux-crypto@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-12-11crypto: hisilicon - select CRYPTO_SKCIPHER, not CRYPTO_BLKCIPHEREric Biggers1-1/+1
Another instance of CRYPTO_BLKCIPHER made it in just after it was renamed to CRYPTO_SKCIPHER. Fix it. Fixes: 416d82204df4 ("crypto: hisilicon - add HiSilicon SEC V2 driver") Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-12-11crypto: hisilicon - Remove useless MODULE macrosZhou Wang1-4/+0
As we already merge hardware sgl into hisi_qm module, remove useless MODULE macros. Fixes: 48c1cd40fae3 (crypto: hisilicon - merge sgl support to hisi_qm module) Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-12-11crypto: hisilicon - Use the offset fields in sqe to avoid need to split ↵Jonathan Cameron3-70/+27
scatterlists We can configure sgl offset fields in ZIP sqe to let ZIP engine read/write sgl data with skipped data. Hence no need to splite the sgl. Fixes: 62c455ca853e (crypto: hisilicon - add HiSilicon ZIP accelerator support) Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-12-11crypto: hisilicon - Fix issue with wrong number of sg elements after dma mapJonathan Cameron1-5/+8
We fill the hardware scatter gather list assuming it will need the same number of elements at the original scatterlist. If an IOMMU is involved, then it may well need fewer. The return value of dma_map_sg tells us how many. Probably never caused visible problems as the hardware won't get to the elements that are incorrect before it finds enough space. Fixes: dfed0098ab91 (crypto: hisilicon - add hardware SGL support) Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-27crypto: hisilicon - fix a NULL vs IS_ERR() bug in sec_create_qp_ctx()Dan Carpenter1-2/+2
The hisi_acc_create_sgl_pool() function returns error pointers, it never returns NULL pointers. Fixes: 416d82204df4 ("crypto: hisilicon - add HiSilicon SEC V2 driver") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-22crypto: hisilicon - add DebugFS for HiSilicon SECZaibo Xu3-0/+332
The HiSilicon SEC engine driver uses DebugFS to provide main debug information for user space. Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Longfang Liu <liulongfang@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-22crypto: hisilicon - add SRIOV for HiSilicon SECZaibo Xu2-3/+153
HiSilicon SEC engine supports PCI SRIOV. This patch enable this feature. User can enable VFs and pass through them to VM, same SEC driver can work in VM to provide skcipher algorithms. Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Longfang Liu <liulongfang@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-22crypto: hisilicon - add HiSilicon SEC V2 driverZaibo Xu7-0/+1875
SEC driver provides PCIe hardware device initiation with AES, SM4, and 3DES skcipher algorithms registered to Crypto. It uses Hisilicon QM as interface to CPU. Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Longfang Liu <liulongfang@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-17crypto: hisilicon - no need to check return value of debugfs_create functionsGreg Kroah-Hartman2-32/+11
When calling debugfs functions, there is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this. Cc: Zhou Wang <wangzhou1@hisilicon.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "David S. Miller" <davem@davemloft.net> Cc: linux-crypto@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-17crypto: hisilicon - add vfs_num module param for zipHao Fang1-84/+98
Currently the VF can be enabled only through sysfs interface after module loaded, but this also needs to be done when the module loaded in some scenarios. This patch adds module param vfs_num, adds hisi_zip_sriov_enable() in probe, and also adjusts the position of probe. Signed-off-by: Hao Fang <fanghao11@huawei.com> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-08crypto: hisilicon - replace #ifdef with IS_ENABLED for CONFIG_NUMAZhou Wang1-26/+25
Replace #ifdef CONFIG_NUMA with IS_ENABLED(CONFIG_NUMA) to fix kbuild error. Fixes: 700f7d0d29c7 ("crypto: hisilicon - fix to return...") Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Reported-by: kbuild test robot <lkp@intel.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-01crypto: hisilicon - fix to return sub-optimal device when best device has no qpsZhou Wang3-20/+77
Currently find_zip_device() finds zip device which has the min NUMA distance with current CPU. This patch modifies find_zip_device to return sub-optimal device when best device has no qps. This patch sorts all devices by NUMA distance, then finds the best zip device which has free qp. Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-01crypto: hisilicon - use sgl API to get sgl dma addr and lenZhou Wang2-3/+2
Use sgl API to get sgl dma addr and len, this will help to avoid compile error in some platforms. So NEED_SG_DMA_LENGTH can be removed here, which can only be selected by arch code. Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Suggested-by: Herbert Xu <herbert@gondor.apana.org.au> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-01crypto: skcipher - rename the crypto_blkcipher module and kconfig optionEric Biggers1-1/+1
Now that the blkcipher algorithm type has been removed in favor of skcipher, rename the crypto_blkcipher kernel module to crypto_skcipher, and rename the config options accordingly: CONFIG_CRYPTO_BLKCIPHER => CONFIG_CRYPTO_SKCIPHER CONFIG_CRYPTO_BLKCIPHER2 => CONFIG_CRYPTO_SKCIPHER2 Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-10-26crypto: hisilicon - fix endianness verification problem of QMShukun Tan2-44/+45
This patch fixes following sparse warning: qm.c:345:33: warning: cast removes address space '<asn:2>' of expression qm.c:359:20: warning: incorrect type in assignment (different base types) qm.c:359:20: expected restricted __le16 [usertype] w0 qm.c:359:20: got int qm.c:362:27: warning: incorrect type in assignment (different base types) qm.c:362:27: expected restricted __le16 [usertype] queue_num qm.c:362:27: got unsigned short [usertype] queue qm.c:363:24: warning: incorrect type in assignment (different base types) qm.c:363:24: expected restricted __le32 [usertype] base_l qm.c:363:24: got unsigned int [usertype] qm.c:364:24: warning: incorrect type in assignment (different base types) qm.c:364:24: expected restricted __le32 [usertype] base_h qm.c:364:24: got unsigned int [usertype] qm.c:451:22: warning: restricted __le32 degrades to integer qm.c:471:24: warning: restricted __le16 degrades to integer ...... qm.c:1617:19: warning: incorrect type in assignment (different base types) qm.c:1617:19: expected restricted __le32 [usertype] dw6 qm.c:1617:19: got int qm.c:1891:24: warning: incorrect type in return expression (different base types) qm.c:1891:24: expected int qm.c:1891:24: got restricted pci_ers_result_t qm.c:1894:40: warning: incorrect type in return expression (different base types) qm.c:1894:40: expected int qm.c:1894:40: got restricted pci_ers_result_t Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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