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2016-02-21clk: sunxi: Improve divs_clk error handling and reportingAndre Przywara1-3/+15
We catch errors in the base clock registration, failure to ioremap and failures in the final of_clk_add_provider() call. Also we unmap the registers when we need to rollback. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-02-21clk: sunxi: improve divider_clk error handling and reportingAndre Przywara1-3/+33
We now report a failing ioremap, failing output names parsing, failures in table registration and in the final step. Also there was a bug where clk_register_divider_table() would return an ERR_PTR value instead of NULL, which we were checking for. We now implement proper rollback in case of an error. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-02-21clk: sunxi: improve mux_clk error handling and reportingAndre Przywara1-6/+15
We now catch and report a failing ioremap, also a failure in the final step of the clock registration is now handled and reported. Also warnings are turned into errors. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-02-16clk: sunxi: Fix sun8i-a23-apb0-clk divider flagsChen-Yu Tsai1-1/+1
The APB0 clock on A23 is a zero-based divider, not a power-of-two based divider. Note that this patch does not apply cleanly to kernels before 4.5-rc1, which added CLK_OF_DECLARE support to this driver. Fixes: 57a1fbf28424 ("clk: sunxi: Add A23 APB0 divider clock support") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-02-11clk: sunxi: Remove clk_register_clkdev callsMaxime Ripard8-19/+4
Now that our protection code doesn't use the global name lookup anymore, we can remove the clkdev registrations. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-02-11clk: sunxi: Remove old probe and protection codeMaxime Ripard1-108/+0
Now that we don't have any user left for the old registration code, we can remove it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-02-11clk: sunxi: convert current clocks registration to CLK_OF_DECLAREMaxime Ripard1-17/+133
The current clock registration and protection code has a few drawbacks, the two main ones being that we create a lot of orphans clock in the registration phase, which will be troublesome when we will start being less relaxed about them. The protection code also relies on clkdev, which we don't really use but for this particular case. Fix both at the same time by moving everyone to the CLK_OF_DECLARE that will probe our clock tree in the right and thus avoid orphans, and by protecting directly the clock returned by our registration function. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-02-11clk: sunxi: Make clocks setup functions take const pointerMaxime Ripard1-3/+3
All the data structure that we pass to the clocks setup functions are declared const, while our setup functions expects a regular pointer. This was hidden by the fact that we cast a void * pointer back to these structures, which made it go unnoticed. Fix the functions prototype. Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-02-11clk: sunxi: Make clocks setup functions return their clockMaxime Ripard1-7/+10
The clocks registration code in clk-sunxi was most of the time not returning the struct clk (or struct clk array) that was registered, preventing the users of such functions to manipulate it, for example to protect it. Make them return it so that we can start using it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-02-02clk: sunxi: improve error reporting for the mux clockAndre Przywara1-4/+16
clk_register_mux returns a pointer wrapped error value in case of failure, so a simple NULL check is not sufficient to catch errors. Fix that and elaborate on the failure reason on the way. The whole function does not return any error value, so silently failing may leave users scratching their heads because the kernel does not provide any clues on what's wrong. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-02-02clk: sunxi: don't mark sun6i_ar100_data __initconstArnd Bergmann1-1/+1
The clk-sun6i-ar100 clk driver is a platform driver that may use deferred probing, so its probe function must not access __init symbols. Kbuild warns about this: WARNING: drivers/clk/sunxi/built-in.o(.text+0x15f0): Section mismatch in reference from the function sun6i_a31_ar100_clk_probe() to the (unknown reference) .init.rodata:(unknown) The function sun6i_a31_ar100_clk_probe() references the (unknown reference) __initconst (unknown). This is often because sun6i_a31_ar100_clk_probe lacks a __initconst annotation or the annotation of (unknown) is wrong. Removing the __initconst annotation avoids the warning and makes deferred probing work. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 3ca2377b6fed ("clk: sunxi: rewrite sun6i-ar100 using factors clk") Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-02-02clk: sunxi: add bus gates for A83TVishnu Patekar1-0/+2
A83T has similar bus gates that of H3, including single gating register has different clock parent. As per H3 and A83T datasheet, usbhost is under AHB2. However,below shows allwinner source code assignment: bits: 26 (ehci0), 27 (ehci1), 29 (ohci0) => AHB1 for A83T. bits: 26 (ehci0), 27 (ehci1) => AHB1 for H3 bits 29, 30, 31(ohci0,1,2) => AHB2 for H3. until, this confusion is cleared keep it H3 way. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-02-02clk: sunxi: Add apb0 gates for A83TVishnu Patekar1-0/+2
APB0 is part of PRCM, and is compatible with earlier SOCs. apb0 gates controls R_PIO, R_UART, R_RSB, etc clocks. This patch adds support for APB0 gates for A83T. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-29clk: sunxi: rewrite sun8i-a23-mbus-clk using the simpler composite clkChen-Yu Tsai1-45/+76
sun8i-a23-mbus-clk used sunxi's factors clk, which is nice for very complicated clocks, but is not really needed here. Convert sun8i-a23-mbus-clk to use clk_composite, as it is a gate + mux + divider. This makes the code easier to understand. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-29clk: sunxi: rewrite sun6i-ar100 using factors clkChen-Yu Tsai1-174/+61
sun6i's AR100 clock is a classic factors clk case: AR100 = ((parent mux) >> p) / (m + 1) Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-29clk: sunxi: rewrite sun6i-a31-ahb1-clk using factors clk with custom recalcChen-Yu Tsai1-208/+83
The factors clk implementation has been extended to support custom recalc callbacks to support clocks that use one factor for certain parents only, like a pre-divider. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-29clk: sunxi: factors: Drop round_rate from clk opsChen-Yu Tsai1-16/+0
The common clock framework requires either determine_rate or round_rate to be implemented. We use determine_rate so we can pass the parent index to the get_factors callback. This cannot be done easily with round_rate, so just drop it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-29clk: sunxi: factors: Support custom formulasChen-Yu Tsai2-2/+32
Some clocks cannot be modelled using the standard factors clk formula, such as clocks with special pre-dividers on one parent, or clocks with all power-of-two dividers. Add support for a custom .recalc callback for factors clk. Also pass the current parent index to the .get_factor and .recalc callbacks. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-27clk: sunxi: factors: Consolidate get_factors parameters into a structChen-Yu Tsai6-219/+155
The .get_factors callback of factors_clk has 6 parameters. To extend factors_clk in any way that requires adding parameters to .get_factors would make that list even longer, not to mention changing all the function declarations. Do this once now and consolidate all the parameters into a struct. Also drop the space before function pointer arguments, since checkpatch complains. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-27clk: sunxi: factors: Add unregister functionChen-Yu Tsai2-0/+30
sunxi's factors clk did not have an unregister function. This means multiple structs were leaked whenever a factors clk was unregistered. Add an unregister function for it. Also keep pointers to the mux and gate structs so they can be freed. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-27clk: sunxi: factors: Add clk cleanup in sunxi_factors_register() error pathChen-Yu Tsai1-15/+29
sunxi_factors_register() does not check for failures or cleanup after clk_register_composite() or other clk-related calls. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-27clk: sunxi: factors: Make struct clk_factors_config table constChen-Yu Tsai5-17/+17
struct clk_factors_config contains shifts/widths for the factors of the factors clk. This is used to read out the factors from the register value. In no case is it written to, so make it const. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-25clk: sunxi: usb: Sort clk providers by chip family and nameChen-Yu Tsai1-12/+12
The latest addition of H3 USB clocks placed them at the bottom. Move it before A80 (sun9i), so they are sorted by SoC family then name. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-24clk: sunxi: Drop clk.h includeStephen Boyd1-1/+0
This file is a clock provider, not a clk consumer. Drop the clk.h include. Cc: Jens Kuske <jenskuske@gmail.com> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-20Merge tag 'armsoc-dt' of ↵Linus Torvalds1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Olof Johansson: "As usual, the bulk of this release is again DT file contents. There's a huge number of changes here, and it's challenging to give a crisp overview of just what is in here. To start with: New boards: - TI-based DM3730 from LogicPD (Torpedo) - Cosmic+ M4 (nommu) initial support (Freescale Vybrid) - Raspberry Pi 2 DT files - Watchdog on Meson8b - Veyron-mickey (ASUS Chromebit) DTS - Rockchip rk3228 SoC and eval board - Sigma Designs Tango4 Improvements: - Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files - Misc new devices for Rockchip rk3036 and rk3288 - Allwinner updates for misc SoCs and systems ... and a _large_ number of other changes across the field. Devices added to SoC DTSI and board DTS files for a number of SoC vendors, new product boards on already-supported SoCs, cleanups and refactorings of existing DTS/DTSI files and a bunch of other changes" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (469 commits) ARM: dts: compulab: add new board description ARM: versatile: add the syscon LEDs to the DT dts: vt8500: Fix errors in SDHC node for WM8505 ARM: dts: imx6q: clean up unused ipu2grp ARM: dts: silk: Add compatible property to "partitions" node ARM: dts: gose: Add compatible property to "partitions" node ARM: dts: porter: Add compatible property to "partitions" node ARM: dts: koelsch: Add compatible property to "partitions" node ARM: dts: lager: Add compatible property to "partitions" node ARM: dts: bockw: Add compatible property to "partitions" node ARM: dts: meson8b: Add watchdog node Documentation: watchdog: Add new bindings for meson8b ARM: meson: Add status LED for Odroid-C1 ARM: dts: uniphier: fix a typo in comment block ARM: bcm2835: Add the auxiliary clocks to the device tree. ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B ARM: bcm2835: Move the CPU/peripheral include out of common RPi DT. ARM: bcm2835: Split the DT for peripherals from the DT for the CPU ARM: realview: set up cache correctly on the PB11MPCore ARM: dts: Unify G2D device node with other devices on exynos4 ...
2016-01-20Merge tag 'armsoc-multiplatform' of ↵Linus Torvalds7-57/+188
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC multiplatform code updates from Arnd Bergmann: "This branch is the culmination of 5 years of effort to bring the ARMv6 and ARMv7 platforms together such that they can all be enabled and boot the same kernel. It has been a tremendous amount of cleanup and refactoring by a huge number of people, and creation of several new (and major) subsystems to better abstract out all the platform details in an appropriate manner. The bulk of this branch is a large patchset from Arnd that brings several of the more minor and older platforms we have closer to multiplatform support. Among these are MMP, S3C64xx, Orion5x, mv78xx0 and realview Much of this is moving around header files from old mach directories, but there are also some cleanup patches of debug_ll (lowlevel debug per-platform options) and other parts. Linus Walleij also has some patchs to clean up the older ARM Realview platforms by finally introducing DT support, and Rob Herring has some for ARM Versatile which is now DT-only. Both of these platforms are now multiplatform. Finally, a couple of patches from Russell for Dove PMU, and a fix from Valentin Rothberg for Exynos ADC, which were rebased on top of the series to avoid conflicts" * tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (75 commits) ARM: realview: don't select SMP_ON_UP for UP builds ARM: s3c: simplify s3c_irqwake_{e,}intallow definition ARM: s3c64xx: fix pm-debug compilation iio: exynos-adc: fix irqf_oneshot.cocci warnings ARM: realview: build realview-dt SMP support only when used ARM: realview: select apropriate targets ARM: realview: clean up header files ARM: realview: make all header files local ARM: no longer make CPU targets visible separately ARM: integrator: use explicit core module options ARM: realview: enable multiplatform ARM: make default platform work for NOMMU ARM: debug-ll: move DEBUG_LL_UART_EFM32 to correct Kconfig location ARM: defconfig: use correct debug_ll settings ARM: versatile: convert to multi-platform ARM: versatile: merge mach code into a single file ARM: versatile: switch to DT only booting and remove legacy code ARM: versatile: add DT based PCI detection ARM: pxa: mark ezx structures as __maybe_unused ARM: pxa: mark raumfeld init functions as __maybe_unused ...
2016-01-20Merge tag 'armsoc-fixes-nc' of ↵Linus Torvalds1-0/+4
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull non-urgent ARM SoC fixes from Olof Johansson: "As usual, we queue up a few fixes that don't seem urgent enough to go in through -rc. - MAINTAINERS updates to add a list for brcmstb and fix a typo - A handful of fixes for OMAP 81xx, a recently resurrected platform so these can't be considered real regressions and thus got queued. - A couple of other small fixes for scoop, sa1100 and davinci" * tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: OMAP2+: Fix randconfig build warning for dm814_pllss_data ARM: sa1100/simpad: Be sure to clamp return value ARM: scoop: Be sure to clamp return value ARM: davinci: fix a problematic usage of WARN() ARM: davinci: only select WT cache if cache is enabled ARM: OMAP2+: Remove useless check for legacy booting for dm814x ARM: OMAP2+: Enable GPIO for dm814x ARM: dts: Fix dm814x pinctrl address and mask ARM: dts: Fix dm8148 control modules ranges ARM: OMAP2+: Fix timer entries for dm814x ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting ARM: OMAP2+: Add DPPLS clock manager for dm814x clk: ti: Add few dm814x clock aliases ARM: dts: Fix dm814x entries for pllss and prcm MAINTAINERS: gpio-brcmstb: Remove stray '>' MAINTAINERS: brcmstb: Include Broadcom internal mailing-list
2016-01-20Merge tag 'asm-generic-for-linus' of ↵Linus Torvalds1-2/+2
git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic Pull asm-generic updates from Arnd Bergmann: "The asm-generic tree this time contains one series from Nicolas Pitre that makes the optimized do_div() implementation from the ARM architecture available to all architectures. This also adds stricter type checking for callers of do_div, which has uncovered a number of bugs in existing code, and fixes up the ones we have found" * tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: ARM: asm/div64.h: adjust to generic codde __div64_32(): make it overridable at compile time __div64_const32(): abstract out the actual 128-bit cross product code do_div(): generic optimization for constant divisor on 32-bit machines div64.h: optimize do_div() for power-of-two constant divisors mtd/sm_ftl.c: fix wrong do_div() usage drm/mgag200/mgag200_mode.c: fix wrong do_div() usage hid-sensor-hub.c: fix wrong do_div() usage ti/fapll: fix wrong do_div() usage ti/clkt_dpll: fix wrong do_div() usage tegra/clk-divider: fix wrong do_div() usage imx/clk-pllv2: fix wrong do_div() usage imx/clk-pllv1: fix wrong do_div() usage nouveau/nvkm/subdev/clk/gk20a.c: fix wrong do_div() usage
2016-01-13clk: remove duplicated COMMON_CLK_NXP record from clk/KconfigVladimir Zapolskiy1-5/+0
Presumably the second COMMON_CLK_NXP config option in drivers/clk/Kconfig appeared after a merge conflict resolution, remove the wrong record of two. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-01-04Merge tag 'tegra-for-4.5-clk' of ↵Michael Turquette11-928/+4980
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next clk: tegra: Changes for v4.5-rc1 This set of changes adds support for the Tegra210 SoC and contains a couple fixes and cleanups.
2016-01-02clk: fix clk-gpio.c with optional clock= DT propertyRussell King1-9/+13
When the clock DT property is not given, of_clk_get_parent_count() returns -ENOENT, which then tries to allocate -2 x 4 bytes of memory, which of course fails, causing the whole driver to fail to create the clock. This causes the SolidRun platforms to fail probing the SDHCI1 interface which is connected to the WiFi. Fix this by detecting errno codes, skipping the allocation, and fixing of_clk_gpio_gate_delayed_register_get() to handle a NULL parent_names array. Fixes: 80eeb1f0f757 ("clk: add gpio controlled clock multiplexer") Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-01-02Merge branch 'clk-rockchip' into clk-nextMichael Turquette4-47/+116
2016-01-02clk: rockchip: fix section mismatches with new child-clocksHeiko Stübner4-47/+116
To model the muxes downstream of fractional dividers we introduced the child property, allowing to describe a direct child clock. The first implementation seems to cause section warnings, as the core clock-tree is marked as initdata while the data pointed to from the child element is not. While there may be some way to also set that missing property in the inline notation I didn't find it, so to actually fix the issue for now move the sub-definitions into separate declarations that can have their own __initdata properties. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-31clk: gpio: handle error codes for of_clk_get_parent_count()Brian Norris1-2/+4
We might make bad memory allocations if we get (e.g.) -ENOSYS from of_clk_get_parent_count(). Noticed by Coverity. Fixes: f66541ba02d5 ("clk: gpio: Get parent clk names in of_gpio_clk_setup()") Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Jyri Sarha <jsarha@ti.com> Cc: Sergej Sawazki <ce3a@gmx.de> Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-31clk: gpio: fix memory leakSudip Mukherjee1-1/+3
If we fail to allocate parent_name then we are returning but we missed freeing data which has already been allocated. Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-31Merge branch 'clk-renesas' into clk-nextMichael Turquette1-0/+1
2015-12-31clk: shmobile: r8a7795: Add SATA0 clockUlrich Hecht1-0/+1
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-31Merge tag 'samsung-dt-4.5-2' of ↵Arnd Bergmann1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt Merge "Samsung DeviceTree updates and improvements for 4.5" from Krzysztof Kozlowski: 1. eMMC/SDIO minor fixes usage of bindings on Snow and Peach Chromebooks. 2. Remove FIMD from Odroid XU3-family because on XU3 it cannot be used yet and on XU3-Lite and XU4 it is not supported. 3. Remove deprecated since June 2013 samsung,exynos5-hdmi. 4. Add support for Pseudo Random Generator on Exynos4 (Trats2 for now). This depends on new SSS clock. 5. Add rotator nodes for Exynos4 and Exynos5. 6. Switch DWC3_1 on Odroid XU3 and XU3-Lite to peripheral mode because now it cannot be used as OTG. 7. Cleanup the G2D usage on Exynos4 and add it to a proper domain in case of Exynos4210. 8. Put MDMA1 in proper domain on Exynos4210 as well. 9. Minor cleanups. * tag 'samsung-dt-4.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (21 commits) ARM: dts: Unify G2D device node with other devices on exynos4 ARM: dts: Add power domain to G2D device on exynos4210 ARM: dts: MDMA1 device belongs to LCD0 power domain on exynos4210 ARM: dts: Remove unneeded GPIO include in exynos4412-odroidu3 ARM: dts: exynos4210-universal_c210: Disable DMA for UARTs ARM: dts: Use peripheral mode for dwc3_1 on exynos5422-odroidxu3 ARM: dts: Add rotator node on exynos5420 ARM: dts: Add rotator node on exynos5250 ARM: dts: Fix power domain for sysmmu-rotator device on exynos4 ARM: dts: Add rotator nodes on exynos4 ARM: dts: Enable PRNG module on exynos4412-trats2 ARM: dts: Add PRNG module for exynos4 dt-bindings: remove deprecated compatible string from exynos-hdmi ARM: dts: Remove fimd node from exynos5422-odroidxu3-common ARM: dts: Mark eMMC as non-removable in exynos5250-snow-common ARM: dts: Remove broken-cd from eMMC node in exynos5420-peach-pi ARM: dts: Remove broken-cd from eMMC node in exynos5800-peach-pi ARM: dts: Mark SDIO as non-removable in exynos5250-snow-common ARM: dts: Mark SDIO as non-removable in exynos5420-peach-pit ARM: dts: Mark SDIO as non-removable in exynos5800-peach-pi ...
2015-12-31Merge tag 'omap-for-v4.5/81xx-dts-signed' of ↵Arnd Bergmann1-0/+4
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Pull "reworked dts changes for ti81xx devices and minimal dra62x j5ec-evm support" from Tony Lindgren: Add minimal device tree support for dra62x also known j5eco. It is related to dm814x, just the clocks are a bit different and it has a different set of integrated devices. And let's get some basic dm814x and dra62x devices working as many of the devices are like on am33xx:: - pinctrl using the pinctrl defines as for am33xx - Updated EDMA bindings with support for using exma_xbar - MMC support for dm814x-evm, t410 and dra62x-j5eco-evm - USB support for dm814x-evm, t410 and dra62x-j5eco-evm This branch depends on an earlier omap-for-v4.5/81xx-fixes-signed branch that has dm814x dts fixes interlaced with SoC related fixes to keep things booting. The interlaced SoC and dts fixes were needed because of issues with the device tree defined clocks that just happened to work on bootloader timings for t410 earlier. * tag 'omap-for-v4.5/81xx-dts-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits) ARM: dts: Add usb support for j5-eco evm ARM: dts: Add usb support for hp t410 ARM: dts: Add usb support for dm814x-evm ARM: dts: Add usb support for dm814x and dra62x ARM: dts: Enable emmc on hp t410 ARM: dts: Add mmc support for dra62x j5-eco evm ARM: dts: Add mmc support for dm8148-evm ARM: dts: Add mmc device entries for dm814x ARM: dts: Update edma bindings on dm814x to use edma_xbar ARM: dts: Add pinctrl macros for dm814x ARM: dts: Add minimal dra62x j5-eco evm support ARM: dts: Add basic support for dra62x j5-eco SoC ARM: OMAP2+: Remove useless check for legacy booting for dm814x ARM: OMAP2+: Enable GPIO for dm814x ARM: dts: Fix dm814x pinctrl address and mask ARM: dts: Fix dm8148 control modules ranges ARM: OMAP2+: Fix timer entries for dm814x ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting ARM: OMAP2+: Add DPPLS clock manager for dm814x clk: ti: Add few dm814x clock aliases ...
2015-12-24Merge branch 'clk-bcm2835' into clk-nextMichael Turquette1-54/+101
2015-12-24clk: bcm2835: Add PWM clock supportRemi Pommarel1-0/+13
Register the pwm clock for bcm2835. Signed-off-by: Remi Pommarel <repk@triplefau.lt> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-24clk: bcm2835: Support for clock parent selectionRemi Pommarel1-45/+77
Some bcm2835 clocks used by hardware (like "PWM" or "H264") can have multiple parent clocks. These clocks divide the rate of a parent which can be selected by setting the proper bits in the clock control register. Previously all these parents where handled by a mux clock. But a mux clock cannot be used because updating clock control register to select parent needs a password to be xor'd with the parent index. This patch get rid of mux clock and make these clocks handle their own parent, allowing them to select the one to use. Signed-off-by: Remi Pommarel <repk@triplefau.lt> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-24clk: bcm2835: add a round up ability to the clock divisorRemi Pommarel1-10/+12
Make bcm2835_clock_choose_div to optionally round up the chosen MASH divisor so that the resulting average rate will not be higher than the requested one. Signed-off-by: Remi Pommarel <repk@triplefau.lt> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-24Merge branch 'clk-lpc32xx' into clk-nextMichael Turquette4-1/+1582
2015-12-24clk: lpc32xx: add common clock framework driverVladimir Zapolskiy3-0/+1576
Add support for all configurable clocks found on NXP LPC32xx SoC. The list contains several heterogenous groups of clocks: * system clocks including multiple dividers and muxes, * x397 PLL, HCLK PLL and USB PLL, * peripheral clocks inherited from rtc, hclk and pclk, * USB controller clocks: AHB slave, I2C, OTG, OHCI and device. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-24clk: lpc18xx: add NXP specific COMMON_CLK_NXP configuration symbolVladimir Zapolskiy2-1/+6
The change adds COMMON_CLK_NXP configuration symbol and enables it for NXP LPC18XX architecture, this is needed to reuse drivers/clk/nxp folder for NXP common clock framework drivers other than LPC18XX one. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-23Merge tag 'sunxi-clocks-for-4.5' of ↵Michael Turquette8-12/+628
https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next Allwinner clocks changes for 4.5 Clock patches for the Allwinner SoCs: - H3 clocks - A10/A20 Video Engine clocks - DRAM gates - A80 special CPU clock
2015-12-23Merge branch 'clk-rockchip' into clk-nextMichael Turquette6-105/+253
2015-12-23clk: rockchip: rk3036: include downstream muxes into fractional dividersXing Zheng1-17/+17
Use the newly introduced possibility to combine the fractional dividers with their downstream muxes for all fractional dividers on currently supported RK3036 SoCs. Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-23clk: add flag for clocks that need to be enabled on rate changesHeiko Stuebner1-0/+18
Some clocks need to be enabled to accept rate changes. This patch adds a new flag CLK_SET_RATE_UNGATE that lets clk_change_rate enable the clock before trying to change the rate and disable it again afterwards. This of course doesn't effect clocks that are already running at that point, as their refcount will only temporarily increase. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-08-12 20:19:08 +0000