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path: root/drivers/clk
AgeCommit message (Expand)AuthorFilesLines
2019-02-22clk: tegra: dfll: Fix debugfs_simple_attr.cocci warningsYueHaibing1-9/+9
2019-02-22clk: qoriq: Improve an error messageDan Carpenter1-2/+2
2019-02-22clk: at91: optimize clk_round_rate() for AUDIO_PLLMichał Mirosław1-1/+8
2019-02-22clk: x86: Move clk-lpss.h to platform_data/x86Andy Shevchenko1-1/+1
2019-02-22clk: fractional-divider: check parent rate only if flag is setKatsuhiro Suzuki1-1/+1
2019-02-22clk: qcom: Make common clk_hw registrationsJeffrey Hugo9-52/+29
2019-02-22clk: actions: Add clock driver for S500 SoCManivannan Sadhasivam3-0/+531
2019-02-21clk: actions: Add configurable PLL delayManivannan Sadhasivam2-7/+25
2019-02-21clk: imx: imx8mm: Mark init function __initStephen Boyd1-1/+1
2019-02-21clk: qcom: gcc-qcs404: Add cfg_offset for blsp1_uart3 clockTaniya Das1-0/+1
2019-02-21clk: qcom: clk-rcg2: Introduce a cfg offset for RCGsTaniya Das2-10/+16
2019-02-21clk: qcom: remove empty lines in clk-rcg.hVinod Koul1-3/+0
2019-02-21clk: stm32mp1: fix bit width of hse_rtc dividerGabriel Fernandez1-1/+1
2019-02-21clk: stm32mp1: remove unnecessary CLK_DIVIDER_ALLOW_ZERO flagGabriel Fernandez1-3/+2
2019-02-21clk: stm32mp1: fix HSI divider flagGabriel Fernandez1-2/+2
2019-02-21clk: stm32mp1: fix mcu divider tableGabriel Fernandez1-1/+1
2019-02-21clk: stm32mp1: set ck_csi as critical clockGabriel Fernandez1-1/+3
2019-02-21clk: stm32mp1: add CLK_SET_RATE_NO_REPARENT to Kernel clocksGabriel Fernandez1-5/+7
2019-02-21clk: stm32mp1: parent clocks updateGabriel Fernandez1-5/+5
2019-02-21clk: clk-twl6040: Fix imprecise external abort for pdmclkTony Lindgren1-2/+51
2019-02-21clk: clk-gpio: add support for sleeping GPIOs in gpio-gate-clkThomas Petazzoni1-2/+37
2019-02-21clk: qcom: clk-rpmh: Add IPA clock supportDavid Dai1-0/+146
2019-02-21clk: mmp2: separate LCDC peripheral clk form the display clockLubomir Rintel1-2/+3
2019-02-21clk: uniphier: Fix update register for CPU-gearKunihiko Hayashi1-1/+1
2019-02-21clk: samsung: s3c2443: Mark expected switch fall-throughGustavo A. R. Silva1-1/+1
2019-02-21clk: samsung: exynos5: Fix kfree() of const memory on setting driver_overrideKrzysztof Kozlowski1-2/+1
2019-02-21clk: samsung: exynos5: Fix possible NULL pointer exception on platform_device...Krzysztof Kozlowski1-2/+8
2019-02-21clk: renesas: r8a774c0: Fix LAST_DT_CORE_CLKFabrizio Castro1-1/+1
2019-02-21clk: imx8mq: Add the missing ARM clockAbel Vesa1-0/+6
2019-02-21clk: imx: imx8mq: Fix the rate propagation for arm pllAbel Vesa1-1/+1
2019-02-21clk: imx8mq: Add support for the CLKO1 clockFabio Estevam1-0/+3
2019-02-21clk: imx8mq: Fix the CLKO2 source select listFabio Estevam1-2/+2
2019-02-21clk: imx8mq: Add missing M4 clocksCarlo Caione1-0/+7
2019-02-21clk: imx: Add clock driver support for imx8mmBai Ping3-0/+682
2019-02-21clk: imx: Add PLLs driver for imx8mm socBai Ping3-1/+418
2019-02-21clk: imx5: add imx5_SCC2_IPG_GATEMichael Grzeschik1-0/+1
2019-02-21clk: imx: scu: add set parent supportAisheng Dong2-3/+100
2019-02-21clk: imx: scu: add fallback compatible string supportAisheng Dong1-0/+1
2019-02-21clk: imx8mq: Make parent names arrays const pointersAbel Vesa1-97/+97
2019-02-21clk: imx: Make parents const pointer in mux wrappersAbel Vesa1-1/+2
2019-02-21clk: imx: Make parent_names const pointer in composite-8mAbel Vesa2-2/+2
2019-02-20clk: at91: fix masterck nameAlexandre Belloni3-4/+4
2019-02-20clk: at91: fix at91sam9x5 peripheral clock numberAlexandre Belloni1-2/+1
2019-02-18clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' staticWei Yongjun1-1/+1
2019-02-15Merge tag 'tegra-for-5.1-clk' of git://git.kernel.org/pub/scm/linux/kernel/gi...Arnd Bergmann7-98/+913
2019-02-15clk: ti: check clock type before doing autoidle opsAndreas Kemnade1-4/+16
2019-02-15clk: ti: add a usecount for autoidleAndreas Kemnade1-4/+28
2019-02-15clk: ti: generalize the init sequence of clk_hw_omap clocksTero Kristo6-24/+31
2019-02-15clk: ti: remove usage of CLK_IS_BASICTero Kristo6-6/+6
2019-02-15clk: ti: add new API for checking if a provided clock is an OMAP clockTero Kristo2-0/+20