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drivers
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clk
Age
Commit message (
Expand
)
Author
Files
Lines
2019-02-15
clk: ti: move clk_hw_omap list handling under generic part of the driver
Tero Kristo
3
-39
/
+69
2019-02-13
Merge tag 'sunxi-clk-fixes-for-5.0' of https://git.kernel.org/pub/scm/linux/k...
Stephen Boyd
2
-3
/
+3
2019-02-13
clk: meson: meson8b: fix the naming of the APB clocks
Martin Blumenstingl
2
-14
/
+14
2019-02-13
clk: meson: Add G12A AO Clock + Reset Controller
Neil Armstrong
4
-1
/
+491
2019-02-06
clk: clk-st: avoid clkdev lookup leak at remove
Matti Vaittinen
1
-1
/
+2
2019-02-06
clk: clk-max77686: Clean clkdev lookup leak and use devm
Matti Vaittinen
1
-22
/
+6
2019-02-06
clkdev: add managed clkdev lookup registration
Matti Vaittinen
1
-23
/
+88
2019-02-06
clk: Add (devm_)clk_get_optional() functions
Phil Edworthy
1
-0
/
+11
2019-02-06
clk: Add comment about __of_clk_get_by_name() error values
Phil Edworthy
1
-0
/
+6
2019-02-06
clk: tegra: dfll: build clk-dfll.c for Tegra124 and Tegra210
Peter De Schrijver
2
-1
/
+6
2019-02-06
clk: tegra: dfll: add CVB tables for Tegra210
Joseph Lo
2
-0
/
+427
2019-02-06
clk: tegra: dfll: round down voltages based on alignment
Joseph Lo
1
-8
/
+13
2019-02-06
clk: tegra: dfll: support PWM regulator control
Joseph Lo
1
-67
/
+377
2019-02-06
clk: tegra: dfll: CVB calculation alignment with the regulator
Joseph Lo
4
-14
/
+59
2019-02-06
clk: tegra: dfll: registration for multiple SoCs
Peter De Schrijver
1
-11
/
+34
2019-02-05
clk: ingenic: jz4740: Fix gating of UDC clock
Paul Cercueil
1
-1
/
+1
2019-02-05
clk: mediatek: update clock driver of MT2712
Weiyi Lu
1
-2
/
+6
2019-02-05
clk: renesas: r8a774c0: Add TMU clock
Biju Das
1
-0
/
+5
2019-02-05
clk: renesas: r8a77980: Add RPC clocks
Sergei Shtylyov
1
-0
/
+8
2019-02-05
clk: renesas: rcar-gen3: Add RPC clocks
Sergei Shtylyov
2
-0
/
+105
2019-02-04
clk: meson: factorise meson64 peripheral clock controller drivers
Jerome Brunet
7
-176
/
+313
2019-02-04
clk: meson: g12a: add peripheral clock controller
Jian Hu
5
-2
/
+2594
2019-02-04
clk: meson: pll: update driver for the g12a
Jerome Brunet
2
-59
/
+154
2019-02-02
clk: meson: rework and clean drivers dependencies
Jerome Brunet
29
-281
/
+465
2019-02-02
clk: meson: axg-audio does not require syscon
Jerome Brunet
1
-1
/
+1
2019-02-02
clk: meson: use CONFIG_ARCH_MESON to enter meson clk directory
Jerome Brunet
1
-1
/
+1
2019-02-02
clk: export some clk_hw function symbols for module drivers
Jerome Brunet
1
-0
/
+3
2019-02-01
clk: samsung: exynos5433: Add selected IMEM clocks
Kamil Konieczny
1
-0
/
+32
2019-02-01
clk: samsung: exynos5433: Fix name typo in sssx
Kamil Konieczny
1
-1
/
+1
2019-02-01
clk: samsung: exynos5433: Fix definition of CLK_ACLK_IMEM_{200, 266} clocks
Kamil Konieczny
1
-2
/
+2
2019-01-28
clk: sunxi: A31: Fix wrong AHB gate number
Andre Przywara
1
-2
/
+2
2019-01-25
clk: renesas: rcar-gen3: Add spinlock
Sergei Shtylyov
1
-0
/
+8
2019-01-25
clk: renesas: rcar-gen3: Factor out cpg_reg_modify()
Sergei Shtylyov
1
-18
/
+20
2019-01-25
clk: sunxi-ng: sun8i-a23: Enable PLL-MIPI LDOs when ungating it
Chen-Yu Tsai
1
-1
/
+1
2019-01-24
clk: samsung: fix typo
Matteo Croce
1
-1
/
+1
2019-01-24
clk: qcom: gcc: Use active only source for CPUSS clocks
Taniya Das
1
-4
/
+10
2019-01-24
clk: imx: imx7ulp: use struct_size() in kzalloc()
Gustavo A. R. Silva
1
-8
/
+8
2019-01-24
clk: socfpga: Don't have get_parent for single parent ops
Stephen Boyd
1
-9
/
+13
2019-01-24
clk: ti: Fix error handling in ti_clk_parse_divider_data()
Dan Carpenter
1
-1
/
+10
2019-01-24
clk: imx: Fix fractional clock set rate computation
Abel Vesa
1
-2
/
+3
2019-01-24
clk: Remove global clk traversal on fetch parent index
Derek Basehore
1
-2
/
+12
2019-01-24
Revert "clk: mmp2: add SP clock"
Lubomir Rintel
1
-4
/
+0
2019-01-24
clk: renesas: r8a774c0: Correct parent clock of DU
Geert Uytterhoeven
1
-2
/
+2
2019-01-22
clk: sunxi-ng: v3s: Fix TCON reset de-assert bit
Paul Kocialkowski
1
-1
/
+1
2019-01-21
clk: renesas: r8a774a1: Add missing CANFD clock
Fabrizio Castro
1
-0
/
+2
2019-01-21
clk: renesas: r8a774c0: Add missing CANFD clock
Fabrizio Castro
1
-0
/
+4
2019-01-18
clk: meson: ao-clkc: claim clock controller input clocks from DT
Jerome Brunet
4
-14
/
+82
2019-01-18
clk: meson: axg: claim clock controller input clock from DT
Jerome Brunet
1
-8
/
+19
2019-01-18
clk: meson: gxbb: claim clock controller input clock from DT
Jerome Brunet
1
-13
/
+24
2019-01-15
clk: socfpga: stratix10: fix naming convention for the fixed-clocks
Dinh Nguyen
1
-10
/
+10
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