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path: root/drivers/clk
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2013-08-20Merge tag 'zynq-clk-for-3.12' of git://git.xilinx.com/linux-xlnx into clk-nextMike Turquette1-5/+14
2013-08-20clk/zynq/pll: Use #defines for fbdiv min/max valuesSoren Brinkmann1-4/+7
2013-08-20clk/zynq/pll: Fix documentation for PLL register functionSoren Brinkmann1-1/+7
2013-08-19clk: clk-mux: implement remuxing on set_rateJames Hogan2-0/+50
2013-08-19clk: add CLK_SET_RATE_NO_REPARENT flagJames Hogan16-274/+384
2013-08-19clk: add support for clock reparent on set_rateJames Hogan1-46/+96
2013-08-19clk: move some parent related functions upwardsJames Hogan1-104/+104
2013-08-19clk: abstract parent cacheJames Hogan1-7/+14
2013-08-16clk: export fixed-factor, gate & mux registrationMike Turquette3-0/+5
2013-08-16clk: clk-divider: Export clk_register_divider()Fabio Estevam1-0/+2
2013-08-16clk: fixed-rate: Export clk_fixed_rate_register()Stephen Boyd1-0/+1
2013-08-13clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocksSylwester Nawrocki1-30/+34
2013-08-13clk/zynq/clkc: Add CLK_SET_RATE_PARENT flag to ethernet muxesSoren Brinkmann1-4/+6
2013-08-13clk/zynq/clkc: Add dedicated spinlock for the SWDTSoren Brinkmann1-1/+2
2013-08-12clk: tegra114: add LP1 suspend/resume supportJoseph Lo1-0/+12
2013-08-08clk: prima2: Fix incorrect placement of __initdataSachin Kamat1-1/+1
2013-08-08clk: tegra30: Fix incorrect placement of __initdataSachin Kamat1-1/+1
2013-08-08clk: tegra20: Fix incorrect placement of __initdataSachin Kamat1-1/+1
2013-08-08clk: tegra114: Fix incorrect placement of __initdataSachin Kamat1-1/+1
2013-08-08clk: exynos5440: Fix incorrect placement of __initdataSachin Kamat1-1/+1
2013-08-08clk: exynos5420: Fix incorrect placement of __initdataSachin Kamat1-3/+3
2013-08-08clk: exynos5250: Fix incorrect placement of __initdataSachin Kamat1-5/+5
2013-08-08clk: exynos4: Fix incorrect placement of __initdataSachin Kamat1-5/+5
2013-08-08clk: s2mps11: Add support for s2mps11Yadwinder Singh Brar3-0/+280
2013-08-08clk: exynos5420: Make exynos5420_plls staticSachin Kamat1-1/+1
2013-08-08clk: exynos5250: Make exynos5250_plls staticSachin Kamat1-1/+1
2013-08-08clk: exynos4: Make exynos4_plls staticSachin Kamat1-1/+1
2013-08-08clk: mxs: clk-imx23: Include <linux/clk/mxs.h>Fabio Estevam1-0/+1
2013-08-08clk: sunxi: Fix checking return value of clk_register_[composite|factors]Axel Lin1-2/+2
2013-08-08Merge branch 'clk-next-s3c64xx' into clk-nextMike Turquette5-1/+649
2013-08-05clk: samsung: Add clock driver for S3C64xx SoCsTomasz Figa2-0/+476
2013-08-05clk: samsung: pll: Add support for PLL6552 and PLL6553Tomasz Figa2-0/+164
2013-08-05clk: mux: Add support for read-only muxes.Tomasz Figa1-1/+9
2013-08-02clk: samsung: Add EPLL and VPLL freq table for exynos5250 SoCVikas Sajjan2-0/+40
2013-08-02clk: samsung: Reorder MUX registration for mout_vpllsrcVikas Sajjan1-1/+6
2013-08-02clk: samsung: Add set_rate() clk_ops for PLL36xxVikas Sajjan1-1/+78
2013-08-02clk: samsung: Add set_rate() clk_ops for PLL35xxYadwinder Singh Brar1-1/+104
2013-08-02clk: samsung: Add support to register rate_table for samsung pllsYadwinder Singh Brar6-28/+75
2013-08-02clk: samsung: Remove unused pll registeration code for pll35xx and pll36xxYadwinder Singh Brar2-74/+0
2013-08-02clk: samsung: Migrate exynos5420 to use common samsung_clk_register_pll()Yadwinder Singh Brar1-28/+58
2013-08-02clk: samsung: Migrate exynos4 to use common samsung_clk_register_pll()Yadwinder Singh Brar1-14/+26
2013-08-02clk: samsung: Migrate exynos5250 to use common samsung_clk_register_pll()Yadwinder Singh Brar1-19/+41
2013-08-02clk: samsung: Define a common samsung_clk_register_pll()Yadwinder Singh Brar3-0/+125
2013-08-02clk: samsung: Introduce a common samsung_clk_pll structYadwinder Singh Brar1-18/+12
2013-07-30clk: exynos4: Add clock entries for TMUSachin Kamat1-1/+3
2013-07-30clk/exynos5250: add sclk_hdmiphy in the list of special clocksRahul Sharma1-2/+2
2013-07-30clk/exynos5250: add mout_hdmi mux clock for hdmiRahul Sharma1-1/+4
2013-07-29clk: exynos5250: Add G2D gate clockSachin Kamat1-1/+4
2013-07-25clk: exynos-audss: Staticize exynos_audss_clk_initSachin Kamat1-1/+1
2013-07-25clk: exynos5440: Staticize local symbolsSachin Kamat1-7/+7