linux - Linux Kernel (branches are rebased on master from time to time)

Age	Commit message (Expand)	Author	Files	Lines
2018-10-18	Merge branch 'clk-ti' into clk-next	Stephen Boyd	16	-480/+2276
2018-10-18	Merge branch 'clk-k3-tisci' into clk-next	Stephen Boyd	4	-1/+12
2018-10-18	Merge branches 'clk-mvebu-periph-pm', 'clk-meson', 'clk-allwinner', 'clk-mveb...	Stephen Boyd	22	-740/+925
2018-10-18	Merge branches 'clk-qcom-sdm845-camcc' and 'clk-mtk-unused' into clk-next	Stephen Boyd	4	-5/+1754
2018-10-18	Merge branch 'clk-renesas' into clk-next	Stephen Boyd	18	-168/+1333
2018-10-18	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	Stephen Boyd	50	-162/+166
2018-10-18	Merge branches 'clk-spdx', 'clk-qcom-dfs', 'clk-smp2s11-include', 'clk-qcom-8...	Stephen Boyd	5	-102/+568
2018-10-16	clk: mvebu: armada-37xx-tbg: Switch to clk_get and balance it in probe	Gregory CLEMENT	1	-1/+2
2018-10-16	clk: ti: Prepare for remove of OF node name	Stephen Boyd	1	-6/+3
2018-10-11	clk: Clean up suspend/resume coding style	Stephen Boyd	1	-20/+22
2018-10-07	clk: keystone: add missing MODULE_LICENSE	Arnd Bergmann	2	-0/+10
2018-10-03	clk: ti: Add functions to save/restore clk context	Russ Dill	6	-0/+200
2018-10-03	clk: clk: Add clk_gate_restore_context function	Keerthy	1	-0/+19
2018-10-03	clk: Add functions to save/restore clock context en-masse	Russ Dill	1	-0/+74
2018-10-03	clk: ti: dra7: add new clkctrl data	Tero Kristo	3	-3/+874
2018-10-03	clk: ti: dra7xx: rename existing clkctrl data as compat data	Tero Kristo	5	-804/+829
2018-10-03	clk: ti: am43xx: add new clkctrl data for am43xx	Tero Kristo	3	-5/+268
2018-10-03	clk: ti: am43xx: rename existing clkctrl data as compat data	Tero Kristo	5	-207/+233
2018-10-03	clk: ti: am33xx: add new clkctrl data for am33xx	Tero Kristo	3	-3/+250
2018-10-03	clk: ti: am33xx: rename existing clkctrl data as compat data	Tero Kristo	5	-198/+224
2018-10-03	clk: ti: clkctrl: replace dashes from clkdm name with underscore	Tero Kristo	1	-0/+10
2018-10-03	clk: ti: clkctrl: support multiple clkctrl nodes under a cm node	Tero Kristo	3	-18/+52
2018-10-02	clk: keystone: Enable TISCI clocks if K3_ARCH	Nishanth Menon	2	-1/+2
2018-10-02	clk: davinci: kill davinci_clk_reset_assert/deassert()	Bartosz Golaszewski	1	-18/+0
2018-10-01	clk: mvebu: ap806: Remove superfluous of_clk_add_provider	Gregory CLEMENT	1	-1/+0
2018-10-01	clk: mvebu: use SPDX-License-Identifier	Gregory CLEMENT	17	-52/+17
2018-09-28	clk: renesas: Convert to SPDX identifiers	Kuninori Morimoto	21	-89/+25
2018-09-28	clk: renesas: r7s9210: Add SPI clocks	Chris Brandt	1	-0/+3
2018-09-26	clk: renesas: r7s9210: Move table update to separate function	Chris Brandt	1	-45/+50
2018-09-26	clk: renesas: r7s9210: Convert some clocks to early	Chris Brandt	1	-6/+26
2018-09-26	clk: renesas: cpg-mssr: Add early clock support	Chris Brandt	2	-21/+89
2018-09-26	clk: meson: meson8b: use the regmap in the internal reset controller	Martin Blumenstingl	1	-7/+6
2018-09-26	clk: meson: meson8b: register the clock controller early	Martin Blumenstingl	1	-60/+34
2018-09-26	clk: meson-axg: pcie: drop the mpll3 clock parent	Yixun Lan	1	-2/+4
2018-09-26	clk: meson: axg: round audio system master clocks down	Jerome Brunet	1	-11/+23
2018-09-26	clk: meson: clk-pll: drop hard-coded rates from pll tables	Jerome Brunet	5	-142/+162
2018-09-26	clk: meson: clk-pll: remove od parameters	Jerome Brunet	8	-498/+493
2018-09-26	clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary	Jerome Brunet	3	-8/+8
2018-09-26	clk: meson: clk-pll: add enable bit	Jerome Brunet	5	-10/+113
2018-09-25	clk: renesas: r8a77970: Add TPU clock	Sergei Shtylyov	1	-0/+1
2018-09-25	clk: renesas: r8a77990: Fix incorrect PLL0 divider in comment	Geert Uytterhoeven	1	-2/+2
2018-09-19	clk: renesas: cpg-mssr: Add r8a774c0 support	Fabrizio Castro	5	-0/+299
2018-09-19	clk: renesas: r8a7743: Add r8a7744 support	Biju Das	3	-2/+18
2018-09-11	clk: renesas: cpg-mssr: Add R7S9210 support	Chris Brandt	5	-12/+277
2018-09-11	clk: renesas: r8a77970: Add TMU clocks	Sergei Shtylyov	1	-0/+5
2018-09-11	clk: renesas: r8a77970: Add CMT clocks	Sergei Shtylyov	1	-0/+4
2018-09-11	clk: renesas: r9a06g032: Fix UART34567 clock rate	Phil Edworthy	1	-1/+2
2018-09-05	dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro	Jagan Teki	1	-1/+3
2018-09-05	clk: sunxi-ng: a64: Add max. rate constraint to video PLLs	Icenowy Zheng	1	-24/+26
2018-09-05	clk: sunxi-ng: a64: Add minimal rate for video PLLs	Jagan Teki	1	-22/+24