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path: root/drivers/clk
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2020-06-10Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds130-612/+13263
2020-06-09clk: mediatek: Remove ifr{0,1}_cfg_regs structuresStephen Boyd1-30/+0
2020-06-09clk: baikal-t1: remove redundant assignment to variable 'divider'Colin Ian King1-1/+1
2020-06-09clk: baikal-t1: fix spelling mistake "Uncompatible" -> "Incompatible"Colin Ian King1-1/+1
2020-06-07Merge tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds5-48/+25
2020-06-04Merge tag 'arm-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/...Linus Torvalds10-140/+165
2020-06-04Merge tag 'arm-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds5-144/+21
2020-06-03clk: sprd: fix compile-testingArnd Bergmann1-1/+1
2020-06-02Merge tag 'pm-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafae...Linus Torvalds2-4/+32
2020-06-01Merge branches 'clk-vc5', 'clk-hsdk', 'clk-mediatek' and 'clk-baikal' into cl...Stephen Boyd22-32/+3644
2020-06-01Merge branches 'clk-mmp', 'clk-intel', 'clk-ingenic', 'clk-qcom' and 'clk-sil...Stephen Boyd35-82/+7246
2020-06-01Merge branches 'clk-unisoc', 'clk-trivial', 'clk-bcm', 'clk-st' and 'clk-ast2...Stephen Boyd10-66/+136
2020-06-01Merge branches 'clk-tegra', 'clk-imx', 'clk-zynq', 'clk-socfpga', 'clk-at91' ...Stephen Boyd52-346/+1805
2020-06-01Merge branches 'clk-selectable', 'clk-amlogic', 'clk-renesas', 'clk-samsung' ...Stephen Boyd14-82/+443
2020-06-01Merge branch 'pm-cpufreq'Rafael J. Wysocki1-3/+27
2020-05-30clk: vc5: Add support for IDT VersaClock 5P49V6965Adam Ford1-0/+11
2020-05-30clk: Add Baikal-T1 CCU Dividers driverSerge Semin5-0/+1210
2020-05-30clk: Add Baikal-T1 CCU PLLs driverSerge Semin7-0/+860
2020-05-29ARM: zynq: Don't select CONFIG_ICSTRob Herring1-1/+1
2020-05-28clk: mediatek: assign the initial value to clk_init_data of mtk_muxWeiyi Lu1-1/+1
2020-05-28clk: mediatek: Add MT6765 clock supportOwen Chen9-0/+1523
2020-05-28CLK: HSDK: CGU: add support for 148.5MHz clockEugeniy Paltsev1-0/+1
2020-05-28CLK: HSDK: CGU: support PLL bypassingEugeniy Paltsev1-27/+34
2020-05-28CLK: HSDK: CGU: check if PLL is bypassed firstEugeniy Paltsev1-4/+4
2020-05-28clk: clk-si5341: Add support for the Si5345 seriesMike Looijmans1-5/+64
2020-05-28clk: qcom: Add missing msm8998 ufs_unipro_core_clk_srcJeffrey Hugo1-0/+27
2020-05-28clk: ingenic: Mark ingenic_tcu_of_match as __maybe_unusedStephen Boyd1-1/+1
2020-05-28clk: X1000: Add FIXDIV for SSI clock of X1000.周琰杰 (Zhou Yanjie)1-6/+111
2020-05-28clk: Ingenic: Add CGU driver for X1830.周琰杰 (Zhou Yanjie)3-0/+459
2020-05-28clk: Ingenic: Adjust cgu code to make it compatible with X1830.周琰杰 (Zhou Yanjie)7-4/+41
2020-05-28clk: Ingenic: Remove unnecessary spinlock when reading registers.周琰杰 (Zhou Yanjie)1-11/+1
2020-05-28clk: intel: remove redundant initialization of variable rate64Colin Ian King1-1/+1
2020-05-28clk: versatile: Fix kconfig dependency on COMMON_CLK_VERSATILERob Herring1-7/+4
2020-05-27clk: mmp2: Add audio clock controller driverLubomir Rintel3-0/+450
2020-05-27clk: mmp2: Add support for power islandsLubomir Rintel4-1/+168
2020-05-27clk: mmp2: Add the audio clockLubomir Rintel1-0/+4
2020-05-27clk: mmp2: Add the I2S clocksLubomir Rintel1-0/+46
2020-05-27clk: mmp2: Rename mmp2_pll_init() to mmp2_main_clk_init()Lubomir Rintel1-2/+2
2020-05-27clk: mmp2: Move thermal register defines up a bitLubomir Rintel1-4/+4
2020-05-27clk: mmp: frac: Allow setting bits other than the numerator/denominatorLubomir Rintel2-0/+4
2020-05-27clk: mmp: frac: Do not lose last 4 digits of precisionLubomir Rintel1-8/+16
2020-05-27clk: ast2600: Fix AHB clock divider for A1Eddie James1-6/+25
2020-05-27clk: clk-flexgen: fix clock-critical handlingAlain Volmat1-0/+1
2020-05-27clk: bcm2835: Constify struct debugfs_reg32Rikard Falkeborn1-3/+3
2020-05-26clk: sprd: add mipi_csi_xx gate clocksChunyan Zhang1-0/+32
2020-05-26clk: sprd: check its parent status before reading gate clockChunyan Zhang2-0/+16
2020-05-26clk: versatile: remove redundant assignment to pointer clkColin Ian King1-1/+1
2020-05-26clk: ti: dra7: remove two unused symbolsJason Yan1-9/+0
2020-05-26clk: at91: allow setting all PMC clock parents via DTMichał Mirosław10-10/+38
2020-05-26clk: at91: allow setting PCKx parent via DTMichał Mirosław12-13/+45