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2014-01-14clk: shmobile: Fix MSTP clock indexValentine Barshak1-2/+2
2014-01-08Merge tag 'for_3.14/samsung-clk' of git://git.kernel.org/pub/scm/linux/kernel...Mike Turquette5-1162/+1284
2014-01-08clk: max77686: Register OF clock providerTomasz Figa1-0/+24
2014-01-08clk: max77686: Refactor driver data handlingTomasz Figa1-13/+14
2014-01-08clk: max77686: Fix clean-up in error and remove pathsTomasz Figa1-19/+10
2014-01-08clk: max77686: Make max77686_clk_register() return struct clk *Tomasz Figa1-7/+10
2014-01-08clk: max77686: Refactor successful exit of probe functionTomasz Figa1-2/+1
2014-01-08clk: max77686: Provide .recalc_rate() operationTomasz Figa1-0/+7
2014-01-08clk: max77686: Correct callback used for checking clock statusTomasz Figa1-2/+2
2014-01-08clk: exynos-audss: add support for Exynos 5420Andrew Bresticker1-7/+33
2014-01-08clk: exynos5250: add clock ID for div_pcm0Andrew Bresticker1-1/+1
2014-01-08clk: exynos-audss: allow input clocks to be specified in device treeAndrew Bresticker1-5/+20
2014-01-08clk: exynos-audss: convert to platform deviceAndrew Bresticker1-16/+88
2014-01-08clk: exynos5440: replace clock ID private enums with IDs from DT headerAndrzej Hajda1-47/+34
2014-01-08clk: exynos5420: replace clock ID private enums with IDs from DT headerAndrzej Hajda1-339/+309
2014-01-08clk: exynos5250: replace clock ID private enums with IDs from DT headerAndrzej Hajda1-295/+264
2014-01-08clk: exynos4: replace clock ID private enums with IDs from DT headerAndrzej Hajda1-455/+402
2014-01-08clk: exynos5250: register APLL rate tableAndrew Bresticker1-1/+24
2014-01-08clk: clk-divider: fix divisor > 255 bugJames Hogan1-1/+1
2014-01-05Merge tag 'samsung-clk-fixes' of git://git.kernel.org/pub/scm/linux/kernel/gi...Mike Turquette3-11/+15
2014-01-03Merge tag 'integrator-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel...Olof Johansson5-20/+80
2014-01-03Merge tag 'renesas-dt3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kerne...Olof Johansson5-0/+720
2014-01-03clk: versatile: fixup IM-PD1 clock implementationLinus Walleij1-15/+71
2014-01-03clk: versatile: pass a name to ICST clock providerLinus Walleij5-6/+10
2014-01-02Merge remote-tracking branches 'asoc/topic/ad1836', 'asoc/topic/ad193x', 'aso...Mark Brown1-2/+2
2013-12-31Merge branch 'clk-next-unregister' into clk-nextMike Turquette3-13/+200
2013-12-30Merge branch 'for_3.14/keystone-clk' of git://git.kernel.org/pub/scm/linux/ke...Mike Turquette2-8/+28
2013-12-30clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apllSachin Kamat1-1/+2
2013-12-30clk: samsung: exynos5250: Fix parents of gate clocks from MFC domainTomasz Figa1-3/+5
2013-12-30clk: samsung: exynos5250: Correct parent list of audio muxesTomasz Figa1-3/+3
2013-12-30clk: samsung: exynos5250: Add missing unpopulated mux parentsTomasz Figa1-4/+12
2013-12-30clk: samsung: exynos5250: Fix parent of gate clocks from DISP1 domainTomasz Figa1-6/+8
2013-12-30clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domainTomasz Figa1-8/+17
2013-12-30clk: samsung: exynos5250: Make names of mux and div clocks consistentTomasz Figa1-122/+123
2013-12-30clk: samsung: exynos5250: Sort definitions by registers and bitfieldTomasz Figa1-102/+188
2013-12-30Merge branch 'samsung-fixes' into samsung-next-baseTomasz Figa3-11/+15
2013-12-30clk: exynos: File scope reg_save array should depend on PM_SLEEPKrzysztof Kozlowski1-5/+5
2013-12-30clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clockAbhilash Kesavan1-1/+2
2013-12-30clk: samsung: exynos5250: Add MDMA0 clocksAbhilash Kesavan1-1/+4
2013-12-30clk: samsung: exynos5250: Fix ACP gate register offsetAbhilash Kesavan1-1/+1
2013-12-30clk: exynos5250: fix sysmmu_mfc{l,r} gate clocksAndrew Bresticker1-2/+2
2013-12-30clk: samsung: exynos4: Correct SRC_MFC registerSeung-Woo Kim1-1/+1
2013-12-29Merge tag 'sunxi-clk-3.14-for-mike' of https://bitbucket.org/emiliolopez/linu...Mike Turquette3-77/+437
2013-12-28clk: sunxi: Allwinner A20 output clock supportChen-Yu Tsai1-0/+57
2013-12-28clk: sunxi: support better factor DT nodesEmilio López1-0/+9
2013-12-28clk: sunxi: mod0 supportEmilio López1-0/+57
2013-12-28clk: sunxi: add PLL5 and PLL6 supportEmilio López1-0/+230
2013-12-28clk: sunxi: make factors_clk_setup return the clock it registersEmilio López1-7/+8
2013-12-28clk: sunxi: add gating support to PLL1Emilio López1-0/+2
2013-12-28clk: sunxi: clean the magic number of mux parentsEmilio López1-2/+3