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path:
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/
drivers
/
clk
/
zynq
Age
Commit message (
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Author
Files
Lines
2013-12-20
clk/zynq/clkc: Add 'fclk-enable' feature
Soren Brinkmann
1
-3
/
+15
2013-10-07
clk/zynq: Fix possible memory leak
Felipe Pena
1
-1
/
+15
2013-09-09
Merge tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linux
Linus Torvalds
2
-39
/
+62
2013-08-20
Merge tag 'zynq-clk-for-3.12' of git://git.xilinx.com/linux-xlnx into clk-next
Mike Turquette
1
-5
/
+14
2013-08-20
clk/zynq/pll: Use #defines for fbdiv min/max values
Soren Brinkmann
1
-4
/
+7
2013-08-20
clk/zynq/pll: Fix documentation for PLL register function
Soren Brinkmann
1
-1
/
+7
2013-08-19
clk: add CLK_SET_RATE_NO_REPARENT flag
James Hogan
1
-36
/
+50
2013-08-13
clk/zynq/clkc: Add CLK_SET_RATE_PARENT flag to ethernet muxes
Soren Brinkmann
1
-4
/
+6
2013-08-13
clk/zynq/clkc: Add dedicated spinlock for the SWDT
Soren Brinkmann
1
-1
/
+2
2013-05-27
arm: zynq: Migrate platform to clock controller
Soren Brinkmann
1
-0
/
+3
2013-05-27
clk: zynq: Add clock controller driver
Soren Brinkmann
1
-0
/
+533
2013-05-21
clk: zynq: Factor out PLL driver
Soren Brinkmann
1
-0
/
+235