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2014-02-23clk: ux500: Staticize ux500_twocell_getSachin Kamat1-1/+2
ux500_twocell_get is a local symbol. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-12-19clk: ux500: Remove extra semicolonSachin Kamat1-1/+1
Extra semicolon is redundant. Remove it. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-10-18clk: ux500: fix erroneous bit assignmentLinus Walleij1-1/+1
Due to a typo or similar, the peripheral group 2 clock 11 gate was set to bit 1 instead of bit 11. We need to fix this to be able to set the correct enable bit in the device tree: when trying to correct the bit assignment in the device tree, the system would hang. Cc: Mike Turquette <mturquette@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-26clk: ux500: Provide a look-up for the ARMSS clockLee Jones1-0/+1
The ARMSS clock is used by the newly DT enabled CPUFreq driver. Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-26clk: ux500: Add Device Tree support for the TWD clockLee Jones1-2/+5
This patch enables the TWD fixed factor clock to be specified from Device Tree via phandles to the "smp-twd-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-26clk: ux500: Add Device Tree support for the RTC clockLee Jones1-2/+5
This patch enables the RTC fixed frequency clock to be specified from Device Tree via phandles to the "rtc32k-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-26clk: ux500: Add Device Tree support for the PRCC Kernel clockLee Jones1-0/+32
This patch enables clocks to be specified from Device Tree via phandles to the "prcc-kernel-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-26clk: ux500: Add Device Tree support for the PRCC Peripheral clockLee Jones1-0/+52
This patch enables clocks to be specified from Device Tree via phandles to the "prcc-periph-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-26clk: ux500: Add Device Tree support for the PRCMU clockLee Jones1-2/+48
This patch enables clocks to be specified from Device Tree via phandles to the "prcmu-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-26clk: ux500: Add a 2-cell Device Tree parser for obtaining PRCC clocksLee Jones1-0/+22
PRCC (peripheral and kernel) clocks are specified using a property tuple <&phandle base bit>, where 'base' is the peripheral (1, 2, 3, 5 or 6), and bit is read-in value into that peripheral stipulated by the hardware specification. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-26clk: ux500: Provide u8500_clk with skeleton Device Tree supportLee Jones1-0/+19
The functional components will be added on a per-clock basis. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-26clk: ux500: Copy u8500_clk_init() ready for DT enablementLee Jones2-0/+382
Here we're using the old clock initialisation function as a template. It's necessary to remove all of the clk_register_clkdev() calls as they don't make sense when booting with Device Tree. Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-26clk: ux500: Remove BML8580 clockLee Jones1-1/+1
There is no mention of the PRCMU_BML8580CLK in any of the Design Specifications for the chips supported in Mainline. In fact, where it is incorrectly used in the u8540 clock definition driver it would have the side effect of using the incorrect clock management address ([PRCM_BML8580CLK_MGT] 0x108 instead of the correct value 0x04C). Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-03Merge tag 'clk-for-linus-3.11' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds3-9/+567
Pull clock framework updates from Mike Turquette: "The common clock framework changes for 3.11 include new clock drivers across several different platforms and architectures, fixes to existing drivers, a MAINTAINERS file fix and improvements to the basic clock types that allow them to be of use to more platforms than before. Only a few fixes to the core framework are included with most all of the changes landing in the various clock drivers themselves." * tag 'clk-for-linus-3.11' of git://git.linaro.org/people/mturquette/linux: (55 commits) clk: tegra: fix ifdef for tegra_periph_reset_assert inline clk: tegra: provide tegra_periph_reset_assert alternative clk: exynos4: Fix clock aliases for cpufreq related clocks clk: samsung: Add MUX_FA macro to pass flag and alias clk: add support for Rockchip gate clocks clk: vexpress: Make the clock drivers directly available for arm64 clk: vexpress: Use full node name to identify individual clocks clk: tegra: T114: add DFLL DVCO reset control clk: tegra: T114: add DFLL source clocks clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLL clk: gate: add CLK_GATE_HIWORD_MASK clk: divider: add CLK_DIVIDER_HIWORD_MASK flag clk: mux: add CLK_MUX_HIWORD_MASK clk: Always notify whole subtree when reparenting MAINTAINERS: make drivers/clk entry match subdirs clk: honor CLK_GET_RATE_NOCACHE in clk_set_rate clk: use clk_get_rate() for debugfs clk: tegra: Use override bits when needed clk: tegra: override bits for Tegra30 PLLM clk: tegra: override bits for Tegra114 PLLM ...
2013-06-06clk: ux500: Clocks definition for u8540Philippe Begnic1-1/+559
First clocks definition version of PRCMU and PRCC clocks for u8540 platform Signed-off-by: Philippe Begnic <philippe.begnic@st.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-06-06clk: ux500: Pass clock base adresses in initcall for u8540 and u9540Philippe Begnic2-4/+4
Align on u8500 version, pass clock base address in clk_init functions for u8540 and u9540. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Philippe Begnic <philippe.begnic@st.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-29clk: ux500: clk-sysctrl: handle clocks with no parentsFabio Baltieri1-1/+7
Fix clk_reg_sysctrl() to set main clock registers of new struct clk_sysctrl even if the registered clock has no parents. This fixes an issue where "ulpclk" was registered with all clk->reg_* fields uninitialized, causing a -EINVAL error from clk_prepare(). Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-29clk: ux500: Provide device enumeration number suffix for SMSC911xLee Jones1-1/+1
First Ethernet device has a ".0" appended onto the device name. It appears that we need this in order to obtain the correct clock. Without this fix Ethernet does not function on Ux500 devices, which is a regression. Cc: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: improved changelog]
2013-05-28clk: ux500: abx500-clk: rename ux500 audio codec aliasesFabio Baltieri1-4/+4
Change soc-audio related clk_register_clkdev() device names to reflect the ones actually used in current snd-soc-mop500 and ab8500-codec drivers. Cc: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-02Merge tag 'multiplatform-for-linus' of ↵Linus Torvalds2-72/+71
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC multiplatform updates from Olof Johansson: "More multiplatform enablement for ARM platforms. The ones converted in this branch are: - bcm2835 - cns3xxx - sirf - nomadik - msx - spear - tegra - ux500 We're getting close to having most of them converted! One of the larger platforms remaining is Samsung Exynos, and there are a bunch of supporting patches in this merge window for it. There was a patch in this branch to a early version of multiplatform conversion, but it ended up being reverted due to need of more bake time. The revert commit is part of the branch since it would have required rebasing multiple dependent branches and they were stable by then" * tag 'multiplatform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (70 commits) mmc: sdhci-s3c: Fix operation on non-single image Samsung platforms clocksource: nomadik-mtu: fix up clocksource/timer Revert "ARM: exynos: enable multiplatform support" ARM: SPEAr13xx: Fix typo "ARCH_HAVE_CPUFREQ" ARM: exynos: enable multiplatform support rtc: s3c: make header file local mtd: onenand/samsung: make regs-onenand.h file local thermal/exynos: remove unnecessary header inclusions mmc: sdhci-s3c: remove platform dependencies ARM: samsung: move mfc device definition to s5p-dev-mfc.c ARM: exynos: move debug-macro.S to include/debug/ ARM: exynos: prepare for sparse IRQ ARM: exynos: introduce EXYNOS_ATAGS symbol ARM: tegra: build assembly files with -march=armv7-a ARM: Push selects for TWD/SCU into machine entries ARM: ux500: build hotplug.o for ARMv7-a ARM: ux500: move to multiplatform ARM: ux500: make remaining headers local ARM: ux500: make irqs.h local to platform ARM: ux500: get rid of <mach/[hardware|db8500-regs].h> ...
2013-05-02Merge tag 'fixes-nc-for-linus' of ↵Linus Torvalds1-1/+2
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC non-critical fixes from Olof Johansson: "Here is a collection of fixes (and some intermixed cleanups) that were considered less important and thus not included in the later parts of the 3.9-rc cycle. It's a bit all over the map, contents wise. A series of ux500 fixes and cleanups, a bunch of various fixes for OMAP and tegra, and some for Freescale i.MX and even Qualcomm MSM. Note that there's also a patch on this branch to globally turn off -Wmaybe-uninitialized when building with -Os. It's been posted several times by Arnd and no dissent was raised, but nobody seemed interested to pick it up. So here it is, as the topmost patch." * tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (70 commits) Turn off -Wmaybe-uninitialized when building with -Os ARM: orion5x: include linux/cpu.h ARM: tegra: call cpu_do_idle from C code ARM: u300: fix ages old copy/paste bug ARM: OMAP2+: add dependencies on ARCH_MULTI_V6/V7 ARM: tegra: solve adr range issue with THUMB2_KERNEL enabled ARM: tegra: fix relocation truncated error when THUMB2_KERNEL enabled ARM: tegra: fix build error when THUMB2_KERNEL enabled ARM: msm: Fix uncompess.h tx underrun check ARM: vexpress: Remove A9 PMU compatible values for non-A9 platforms ARM: cpuimx27 and mbimx27: prepend CONFIG_ to Kconfig macro ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS" ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD" ARM: mach-imx: mach-imx6q: Fix sparse warnings ARM: mach-imx: src: Include "common.h ARM: mach-imx: gpc: Include "common.h" ARM: mach-imx: avic: Staticize *avic_base ARM: mach-imx: tzic: Staticize *tzic_base ARM: mach-imx: clk: Include "clk.h" ARM: mach-imx: clk-busy: Staticize clk_busy_mux_ops ...
2013-04-22clk: ux500: fix mismatched typesMike Turquette1-2/+3
As reported by Rob Herring[1] there were some mismatched types between drivers/clk/ux500/clk.h and the corresponding function definitions: drivers/clk/ux500/clk-prcc.c:145:13: error: conflicting types for 'clk_reg_prcc_pclk' drivers/clk/ux500/clk-prcc.c:155:13: error: conflicting types for 'clk_reg_prcc_kclk' [1] http://article.gmane.org/gmane.linux.ports.arm.kernel/232246 Signed-off-by: Mike Turquette <mturquette@linaro.org> Cc: Rob Herring <robherring2@gmail.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org>
2013-04-10clk: ux500: abx500: Define clock tree for ab850xUlf Hansson1-3/+68
The patch setups the first version of the clock tree for ab850x, which is used by u8500 platforms. Mainly sysctrl clocks are used. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Fabio Baltieri <fabio.baltieri@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-04-10clk: ux500: Add support for sysctrl clocksUlf Hansson3-0/+251
The abx500 sysctrl clocks are using the ab8500 sysctrl driver to modify the clock hardware. Sysctrl clocks are represented by a ab8500 sysctrl register and with a corresponding bitmask. The sysctrl clocks are slow path clocks, which means clk_prepare and clk_unprepare will be used to gate|ungate these clocks. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-04-08ARM: ux500: get rid of <mach/[hardware|db8500-regs].h>Linus Walleij1-1/+0
This removes <mach/hardware.h> and <mach/db8500-regs.h> from the Ux500, merging them into the local include "db8500-regs.h" in mach-ux500. There is some impact outside the ux500 machine, but most of it is dealt with in earlier patches. Contains portions of a clean-up patch from Arnd Bergmann. Cc: Samuel Ortiz <sameo@linux.intel.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-08clk: ux500: pass clock base adresses in init callLinus Walleij1-71/+71
The ux500 clock driver was including <mach/db8500-regs.h> which will not work when building for multiplatform support since <mach/*> is going away. Pass the base adresses in the init call instead. Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Mike Turquette <mturquette@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27clk: ux500: Fix prcmu clocks registrationMaxime Coquelin1-5/+5
In clk_reg_prcmu(), clk->hw.init field is assigned with a reference local to clk_reg_prcmu() function. This patch replaces references to clk->hw.init with calls to __clk_get_name when called after clock registration. This patch applies on top of v3.9-rc4. Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: resolved trivial merge issues]
2013-03-19clk: ux500: Support is_prepared callback for clk-prcmuUlf Hansson1-54/+80
To be able to gate unused prcmu clocks from the clk_disable_unused sequence, clk-prcmu now implements the is_prepared callback. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-03-01clk: ux500: Provide an alias for the SMSC911x Ethernet chipLee Jones1-0/+1
In the case of some of the ux500 platforms, an Ethernet chip is placed on an extended bus which is traditionally used as a NAND flash chip placeholder. The p3_pclk0 clock is used to control it, so we are required to provide and easy way to access it from the SMSC911x driver. We do this using an alias provided by this patch. Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-01clk: ux500: Ensure the FMSC clock is obtainableLee Jones1-1/+1
The FMSC clock is traditionally used for NAND flash devices when used on the ux500 series platforms. This patch makes it searchable during a clock-name search. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-03Drivers: misc: remove __dev* attributes.Greg Kroah-Hartman1-1/+1
CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, __devinitconst, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-12-13Merge tag 'multiplatform' of ↵Linus Torvalds1-7/+4
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC multiplatform conversion patches from Olof Johansson: "Here are more patches in the progression towards multiplatform, sparse irq conversions in particular. Tegra has a handful of cleanups and general groundwork, but is not quite there yet on full enablement. Platforms that are enabled through this branch are VT8500 and Zynq. Note that i.MX was converted in one of the earlier cleanup branches as well (before we started a separate topic for multiplatform). And both new platforms for this merge window, sunxi and bcm, were merged with multiplatform support enabled." Fix up conflicts mostly as per Olof. * tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits) ARM: zynq: Remove all unused mach headers ARM: zynq: add support for ARCH_MULTIPLATFORM ARM: zynq: make use of debug_ll_io_init() ARM: zynq: remove TTC early mapping ARM: tegra: move debug-macro.S to include/debug ARM: tegra: don't include iomap.h from debug-macro.S ARM: tegra: decouple uncompress.h and debug-macro.S ARM: tegra: simplify DEBUG_LL UART selection options ARM: tegra: select SPARSE_IRQ ARM: tegra: enhance timer.c to get IO address from device tree ARM: tegra: enhance timer.c to get IRQ info from device tree ARM: timer: fix checkpatch warnings ARM: tegra: add TWD to device tree ARM: tegra: define DT bindings for and instantiate RTC ARM: tegra: define DT bindings for and instantiate timer clocksource/mtu-nomadik: use apb_pclk clk: ux500: Register mtu apb_pclocks ARM: plat-nomadik: convert platforms to SPARSE_IRQ mfd/db8500-prcmu: use the irq_domain_add_simple() mfd/ab8500-core: use irq_domain_add_simple() ...
2012-12-04clk: ux500: fix bit errorLinus Walleij1-1/+1
This fixes a bit error in the U8500 clock implementation: the unused p2_pclk12 registered at bit 12 in periphereral group 6 was defined as using bit 11 rather than bit 12. When walking over and disabling the unused clocks in the tree at late init time, p2_pclk12 was disabled, by effectively clearing the but for p2_pclk11 instead of bit 12 as it should have, thus disabling gpio block 6 and 7. Reported-by: Lee Jones <lee.jones@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Cc: Philippe Begnic <philippe.begnic@st.com> Cc: stable@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-26clk: ux500: Initial support for abx500 clock driverUlf Hansson2-0/+76
The abx500 clock driver is a platform driver which will be initialized during arch init. The platform device shall be added from the ab-core driver as a mfd child device to maintain correct boot sequence. Depending on what ab version we use, different clock definitions will be added. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-15clk: ux500: Register nomadik keypad clock lookups for u8500Ulf Hansson1-0/+4
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-15clk: ux500: Register rng clock lookups for u8500Ulf Hansson1-1/+2
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-15clk: ux500: Register mtu apb_pclocksUlf Hansson1-6/+3
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Mike Turquette <mturquette@ti.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2012-11-09clk: ux500: Register slimbus clock lookups for u8500Ulf Hansson1-2/+3
At the same time the prcc bit for the kclk is corrected to bit 8 instead of 3. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-09clk: ux500: Update rtc clock lookup for u8500Ulf Hansson1-1/+1
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-09clk: ux500: Register msp clock lookups for u8500Ulf Hansson1-0/+18
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-09clk: ux500: Register ssp clock lookups for u8500Ulf Hansson1-0/+6
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-09clk: ux500: Register i2c clock lookups for u8500Ulf Hansson1-1/+18
Cc: Ben Dooks <ben-linux@fluff.org> Cc: Wolfram Sang <w.sang@pengutronix.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-09clk: ux500: Add armss clk and fixup smp_twd clk for u8500Ulf Hansson1-6/+8
The new armss clk is a prcmu_scalable_rate clk which represents the ARMSS clk. This then makes it possible to convert the smp_twd clk to a fixed factor clock type, using a fixed divider of 2 and with the armss clk as parent. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-09clk: ux500: Support for prcmu_scalable_rate clockUlf Hansson2-0/+23
The prcmu_scalable_rate clock can change rate but is not gateable. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-05clk/ux500: explicitly include register headerLinus Walleij1-1/+1
The ux500 clock driver file named u8500_clk.c does not compile if it loose implicit dependencies to <mach/db8500-regs.h> (I have no clue what files will include this) which manifests itself as I'm experimenting with SPARSE_IRQ so make the dependency explicit. Cc: Mike Turquette <mturquette@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-29clk: ux500: Update sdmmc clock to 100MHz for u8500Ulf Hansson1-2/+3
For u8500 and using 100MHz as the frequency also requires the ape opp 100 voltage, thus use the prcmu_opp_volt_scalable clock type. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-10-29clk: ux500: Support prcmu ape opp voltage clockUlf Hansson2-0/+61
Some scalable prcmu clocks needs to be handled in conjuction with the ape opp 100 voltage. A new prcmu clock type clk_prcmu_opp_volt_scalable is implemented to handle this. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-09-06clk: ux500: Define smp_twd clock for u8500Ulf Hansson1-4/+8
The smp_twd clock is based upon a prcmu_rate clock type for the PRCMU_ARMSS clock. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-09-06clk: ux500: Support for prmcu_rate clockUlf Hansson2-0/+19
The prmcu_rate clock is not gateable and has a rate which only can be fetched. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-09-06clk: ux500: Clock definitions for u8500Ulf Hansson1-1/+453
First version of clock definitions of PRCMU and PRCC clocks for the u8500 platform. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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