summaryrefslogtreecommitdiffstats
path: root/drivers/clk/sunxi
AgeCommit message (Expand)AuthorFilesLines
2017-12-19clk: sunxi: sun9i-mmc: Implement reset callback for reset controlsChen-Yu Tsai1-0/+12
2017-11-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2-3/+1
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman3-0/+3
2017-11-01clk: sunxi: explicitly request exclusive reset controlPhilipp Zabel1-1/+1
2017-11-01clk: sunxi: fix build warningCorentin LABBE1-2/+0
2017-08-30clk: sunxi: fix uninitialized accessArnd Bergmann1-0/+4
2017-07-21clk: Convert to using %pOF instead of full_nameRob Herring1-10/+7
2016-11-16Merge tag 'sunxi-clk-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel...Stephen Boyd1-1/+1
2016-11-04clk: sunxi: Fix M factor computation for APB1Stéphan Rafin1-1/+1
2016-10-16clk: sunxi: mod0: improve function-level documentationJulia Lawall1-1/+1
2016-09-08Merge branch 'clk-fixes' into clk-nextStephen Boyd2-3/+3
2016-08-12clk: sunxi: apb0: Use new macro CLK_OF_DECLARE_DRIVERRicardo Ribalda Delgado1-2/+2
2016-08-12clk: sunxi: mod0: Use new macro CLK_OF_DECLARE_DRIVERRicardo Ribalda Delgado1-1/+2
2016-08-08clk: sunxi: Fix return value check in sun8i_a23_mbus_setup()Wei Yongjun1-1/+1
2016-08-08clk: sunxi: pll2: Fix return value check in sun4i_pll2_setup()Wei Yongjun1-2/+2
2016-07-21Merge branch 'clk-fixes' into clk-nextMichael Turquette2-5/+4
2016-07-06clk: sunxi: make clk-* explicitly non-modularPaul Gortmaker6-65/+12
2016-06-16clk: sunxi: remove unused variableArnd Bergmann1-1/+0
2016-06-10clk: sunxi: display: Add per-clock flagsMaxime Ripard1-1/+4
2016-06-10clk: sunxi: tcon-ch1: Do not return a negative error in get_parentMaxime Ripard1-3/+0
2016-05-12clk: sunxi: Add display and TCON0 clocks driverMaxime Ripard2-0/+262
2016-05-02Merge tag 'sunxi-clocks-for-4.7' of https://git.kernel.org/pub/scm/linux/kern...Stephen Boyd6-13/+470
2016-04-25clk: sunxi: Let divs clocks read the base factor clock name from devicetreeJens Kuske1-11/+30
2016-04-22clk: sunxi: Add TCON channel1 clockMaxime Ripard2-0/+301
2016-04-22clk: sunxi: Add PLL3 clockMaxime Ripard2-0/+99
2016-04-22clk: sunxi: Use resource_sizeVaishali Thakkar1-1/+1
2016-04-22clk: sunxi: Add sun6i/8i display supportJean-Francois Moine1-0/+38
2016-04-22clk: sunxi: mod1 clock should modify it's parentAndrea Venturi1-1/+1
2016-04-15clk: sunxi: Remove CLK_IS_ROOTStephen Boyd1-2/+1
2016-03-29clk: sunxi: Make reset_control_ops constPhilipp Zabel3-3/+3
2016-03-15clk: sunxi: Remove use of variable length arrayStephen Boyd1-2/+9
2016-02-25clk: sunxi: Add apb0 gates for H3Krzysztof Adamski1-0/+2
2016-02-21clk: sunxi: Improve divs_clk error handling and reportingAndre Przywara1-3/+15
2016-02-21clk: sunxi: improve divider_clk error handling and reportingAndre Przywara1-3/+33
2016-02-21clk: sunxi: improve mux_clk error handling and reportingAndre Przywara1-6/+15
2016-02-16clk: sunxi: Fix sun8i-a23-apb0-clk divider flagsChen-Yu Tsai1-1/+1
2016-02-11clk: sunxi: Remove clk_register_clkdev callsMaxime Ripard8-19/+4
2016-02-11clk: sunxi: Remove old probe and protection codeMaxime Ripard1-108/+0
2016-02-11clk: sunxi: convert current clocks registration to CLK_OF_DECLAREMaxime Ripard1-17/+133
2016-02-11clk: sunxi: Make clocks setup functions take const pointerMaxime Ripard1-3/+3
2016-02-11clk: sunxi: Make clocks setup functions return their clockMaxime Ripard1-7/+10
2016-02-02clk: sunxi: improve error reporting for the mux clockAndre Przywara1-4/+16
2016-02-02clk: sunxi: don't mark sun6i_ar100_data __initconstArnd Bergmann1-1/+1
2016-02-02clk: sunxi: add bus gates for A83TVishnu Patekar1-0/+2
2016-02-02clk: sunxi: Add apb0 gates for A83TVishnu Patekar1-0/+2
2016-01-29clk: sunxi: rewrite sun8i-a23-mbus-clk using the simpler composite clkChen-Yu Tsai1-45/+76
2016-01-29clk: sunxi: rewrite sun6i-ar100 using factors clkChen-Yu Tsai1-174/+61
2016-01-29clk: sunxi: rewrite sun6i-a31-ahb1-clk using factors clk with custom recalcChen-Yu Tsai1-208/+83
2016-01-29clk: sunxi: factors: Drop round_rate from clk opsChen-Yu Tsai1-16/+0
2016-01-29clk: sunxi: factors: Support custom formulasChen-Yu Tsai2-2/+32