linux - Linux Kernel (branches are rebased on master from time to time)

Age	Commit message (Expand)	Author	Files	Lines
2018-11-13	clk: sunxi-ng: Enable DE2_CCU for SUN8I and SUN50I	Jagan Teki	1	-0/+1
2018-11-05	clk: sunxi-ng: Add support for H6 DE3 clocks	Jernej Skrabec	2	-4/+71
2018-11-05	clk: sunxi-ng: h6: Set video PLLs limits	Jernej Skrabec	1	-0/+4
2018-11-05	clk: sunxi-ng: Use u64 for calculation of NM rate	Jernej Skrabec	1	-3/+15
2018-11-05	clk: sunxi-ng: Adjust MP clock parent rate when allowed	Jernej Skrabec	1	-2/+62
2018-11-05	clk: sunxi-ng: sun50i: h6: Fix MMC clock mux width	Jagan Teki	1	-3/+3
2018-11-05	clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clock	Icenowy Zheng	1	-1/+6
2018-10-31	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	10	-86/+143
2018-09-07	clk: sunxi-ng: sun4i: Set VCO and PLL bias current to lowest setting	Chen-Yu Tsai	1	-1/+9
2018-09-05	dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro	Jagan Teki	1	-1/+3
2018-09-05	clk: sunxi-ng: a64: Add max. rate constraint to video PLLs	Icenowy Zheng	1	-24/+26
2018-09-05	clk: sunxi-ng: a64: Add minimal rate for video PLLs	Jagan Teki	1	-22/+24
2018-09-05	clk: sunxi-ng: sun50i: h6: Add 2x fixed post-divider to MMC module clocks	Icenowy Zheng	1	-20/+23
2018-08-27	clk: sunxi-ng: a83t: Add max. rate constraint to video PLLs	Jernej Skrabec	1	-0/+2
2018-08-27	clk: sunxi-ng: nkmp: Add constraint for maximum rate	Jernej Skrabec	2	-0/+8
2018-08-27	clk: sunxi-ng: r40: Add max. rate constraint to video PLLs	Jernej Skrabec	1	-26/+26
2018-08-27	clk: sunxi-ng: h3/h5: Add max. rate constraint to pll-video	Jernej Skrabec	1	-12/+13
2018-08-27	clk: sunxi-ng: Add maximum rate constraint to NM PLLs	Jernej Skrabec	2	-0/+37
2018-08-27	clk: sunxi-ng: h6: fix PWM gate/reset offset	Rongyi Chen	1	-1/+1
2018-08-27	clk: sunxi-ng: h6: fix bus clocks' divider position	Icenowy Zheng	1	-4/+4
2018-08-15	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	3	-35/+42
2018-06-27	clk: sunxi-ng: add A64 compatible string	Icenowy Zheng	1	-7/+4
2018-06-27	clk: sunxi-ng: r40: Export video PLLs	Jernej Skrabec	1	-2/+6
2018-06-27	clk: sunxi-ng: r40: Allow setting parent rate to display related clocks	Jernej Skrabec	1	-4/+8
2018-06-27	clk: sunxi-ng: r40: Add minimal rate for video PLLs	Jernej Skrabec	1	-22/+24
2018-06-21	clk: sunxi-ng: replace lib-y with obj-y	Masahiro Yamada	1	-24/+15
2018-05-17	clk: sunxi-ng: r40: export a regmap to access the GMAC register	Icenowy Zheng	1	-0/+33
2018-05-17	clk: sunxi-ng: r40: rewrite init code to a platform driver	Icenowy Zheng	1	-11/+28
2018-05-04	clk: sunxi-ng: add support for H6 PRCM CCU	Icenowy Zheng	4	-0/+232
2018-04-13	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	10	-35/+1375
2018-03-21	clk: sunxi-ng: add missing hdmi-slow clock for H6 CCU	Icenowy Zheng	2	-1/+5
2018-03-18	clk: sunxi-ng: add support for the Allwinner H6 CCU	Icenowy Zheng	4	-0/+1269
2018-03-18	clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks	Icenowy Zheng	2	-3/+19
2018-03-02	clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO	Jernej Skrabec	1	-1/+3
2018-03-02	clk: sunxi-ng: h3: h5: Allow some clocks to set parent rate	Jernej Skrabec	1	-3/+6
2018-03-02	clk: sunxi-ng: h3: h5: Add minimal rate for video PLL	Jernej Skrabec	1	-11/+12
2018-03-02	clk: sunxi-ng: Add check for minimal rate to NM PLLs	Jernej Skrabec	2	-0/+34
2018-02-19	clk: sunxi-ng: a31: Fix CLK_OUT_* clock ops	Chen-Yu Tsai	1	-3/+3
2018-02-15	clk: sunxi-ng: Use u64 for calculation of nkmp rate	Jernej Skrabec	1	-3/+18
2018-02-15	clk: sunxi-ng: Mask nkmp factors when setting register	Jernej Skrabec	1	-9/+12
2018-02-13	clk: sunxi-ng: remove select on obsolete SUNXI_CCU_X kconfig name	Corentin Labbe	1	-7/+0
2018-01-26	Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner...	Stephen Boyd	7	-43/+185
2018-01-26	Merge branch 'clk-divider-container' into clk-next	Stephen Boyd	1	-1/+1
2018-01-03	clk: sunxi-ng: a83t: Add M divider to TCON1 clock	Jernej Škrabec	1	-2/+2
2017-12-29	clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCU	Icenowy Zheng	1	-3/+3
2017-12-29	clk: sunxi-ng: add support for Allwinner H3 DE2 CCU	Icenowy Zheng	1	-0/+47
2017-12-28	clk: divider: fix incorrect usage of container_of	Jerome Brunet	1	-1/+1
2017-12-21	clk: move clock common macros out from vendor directories	Chunyan Zhang	1	-29/+0
2017-12-08	clk: sunxi-ng: sun8i: a83t: Use sigma-delta modulation for audio PLL	Chen-Yu Tsai	1	-1/+10
2017-12-08	clk: sunxi-ng: sun8i: a83t: Add /2 fixed post divider to audio PLL	Chen-Yu Tsai	1	-3/+6