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path:
root
/
drivers
/
clk
/
sunxi-ng
Age
Commit message (
Expand
)
Author
Files
Lines
2017-02-06
clk: sunxi-ng: sun9i-a80: Fix wrong pointer passed to PTR_ERR()
Wei Yongjun
1
-1
/
+1
2017-02-06
clk: sunxi-ng: select SUNXI_CCU_MULT for sun5i
Arnd Bergmann
1
-0
/
+1
2017-02-06
clk: sunxi-ng: Check kzalloc() for errors and cleanup error path
Stephen Boyd
1
-0
/
+15
2017-01-30
clk: sunxi-ng: Add A80 Display Engine CCU
Chen-Yu Tsai
3
-0
/
+317
2017-01-30
clk: sunxi-ng: Add A80 USB CCU
Chen-Yu Tsai
3
-0
/
+170
2017-01-30
clk: sunxi-ng: Add A80 CCU
Chen-Yu Tsai
4
-0
/
+1291
2017-01-30
clk: sunxi-ng: Support separately grouped PLL lock status register
Chen-Yu Tsai
2
-2
/
+9
2017-01-30
clk: sunxi-ng: mux: Get closest parent rate possible with CLK_SET_RATE_PARENT
Chen-Yu Tsai
1
-1
/
+12
2017-01-30
clk: sunxi-ng: mux: honor CLK_SET_RATE_NO_REPARENT flag
Chen-Yu Tsai
1
-0
/
+15
2017-01-30
clk: sunxi-ng: mux: Fix determine_rate for mux clocks with pre-dividers
Chen-Yu Tsai
1
-3
/
+4
2017-01-27
clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for the GPU
Maxime Ripard
1
-1
/
+1
2017-01-27
clk: sunxi-ng: Call divider_round_rate if we only have a single parent
Maxime Ripard
1
-0
/
+12
2017-01-23
clk: sunxi-ng: Add sun5i CCU driver
Maxime Ripard
4
-0
/
+1100
2017-01-23
clk: sunxi-ng: Implement global pre-divider
Maxime Ripard
2
-1
/
+9
2017-01-23
clk: sunxi-ng: Implement multiplier maximum
Maxime Ripard
6
-20
/
+32
2017-01-23
clk: sunxi-ng: mult: Fix minimum in round rate
Maxime Ripard
1
-1
/
+1
2017-01-23
clk: sunxi-ng: Implement factors offsets
Maxime Ripard
8
-29
/
+79
2017-01-23
clk: sunxi-ng: multiplier: Add fractional support
Maxime Ripard
2
-0
/
+10
2017-01-20
clk: sunxi-ng: add support for V3s CCU
Icenowy Zheng
4
-0
/
+666
2017-01-17
clk: sunxi-ng: a33: Add CLK_SET_RATE_PARENT to ac-dig
Mylène Josserand
1
-1
/
+1
2017-01-02
clk: sunxi-ng: A31: Fix spdif clock register
Marcus Cooper
1
-2
/
+2
2017-01-02
clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33
Icenowy Zheng
1
-1
/
+1
2017-01-02
clk: sunxi-ng: fix PLL_CPUX adjusting on A33
Icenowy Zheng
1
-0
/
+10
2017-01-02
clk: sunxi-ng: fix PLL_CPUX adjusting on H3
Ondrej Jirman
1
-0
/
+10
2016-11-23
Merge branch 'clk-fixes' into clk-next
Stephen Boyd
2
-2
/
+2
2016-11-23
clk: sunxi-ng: enable so-said LDOs for A33 SoC's pll-mipi clock
Icenowy Zheng
1
-1
/
+1
2016-11-21
clk: sunxi-ng: sun6i-a31: Enable PLL-MIPI LDOs when ungating it
Chen-Yu Tsai
1
-1
/
+1
2016-11-16
clk: sunxi-ng: Mark structs static and cleanup spaces
Stephen Boyd
1
-6
/
+6
2016-11-16
Merge tag 'sunxi-clk-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel...
Stephen Boyd
20
-129
/
+1200
2016-11-11
clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks
Chen-Yu Tsai
1
-5
/
+5
2016-11-11
clk: sunxi-ng: sun8i-a23: Set CLK_SET_RATE_PARENT for audio module clocks
Chen-Yu Tsai
1
-3
/
+3
2016-11-03
clk: sunxi-ng: Add A64 clocks
Maxime Ripard
4
-0
/
+999
2016-10-25
clk: sunxi-ng: Implement minimum for multipliers
Maxime Ripard
6
-16
/
+21
2016-10-25
clk: sunxi-ng: Add minimums for all the relevant structures and clocks
Maxime Ripard
5
-23
/
+50
2016-10-25
clk: sunxi-ng: Finish to convert to structures for arguments
Maxime Ripard
2
-25
/
+42
2016-10-25
clk: sunxi-ng: Remove the use of rational computations
Maxime Ripard
4
-51
/
+74
2016-10-20
clk: sunxi-ng: Rename the internal structures
Maxime Ripard
9
-32
/
+32
2016-10-19
clk: sunxi-ng: sun6i-a31: Force AHB1 clock to use PLL6 as parent
Chen-Yu Tsai
1
-0
/
+12
2016-09-20
clk: sunxi-ng: Fix reset offset for the A23 and A33
Maxime Ripard
2
-16
/
+16
2016-09-16
clk: sunxi-ng: sun6i-a31: Fix register offset for mipi-csi clk
Chen-Yu Tsai
1
-1
/
+1
2016-09-16
clk: sunxi-ng: sun6i-a31: set CLK_SET_RATE_UNGATE for all PLLs
Chen-Yu Tsai
1
-10
/
+10
2016-09-16
clk: sunxi-ng: sun6i-a31: Set CLK_SET_RATE_PARENT for display output clocks
Chen-Yu Tsai
1
-9
/
+13
2016-09-14
Merge tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/...
Stephen Boyd
19
-78
/
+3349
2016-09-10
clk: sunxi-ng: Add hardware dependency
Jean Delvare
1
-0
/
+1
2016-09-10
clk: sunxi-ng: Add A23 CCU
Maxime Ripard
3
-0
/
+750
2016-09-10
clk: sunxi-ng: Add A33 CCU support
Maxime Ripard
4
-0
/
+856
2016-09-10
clk: sunxi-ng: Add N-class clocks support
Maxime Ripard
4
-0
/
+173
2016-09-10
clk: sunxi-ng: mux: Add mux table macro
Maxime Ripard
1
-13
/
+13
2016-09-10
clk: sunxi-ng: div: Allow to set a maximum
Maxime Ripard
5
-33
/
+55
2016-09-10
clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure
Maxime Ripard
1
-0
/
+14
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