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path: root/drivers/clk/sunxi-ng
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2016-09-20clk: sunxi-ng: Fix reset offset for the A23 and A33Maxime Ripard2-16/+16
2016-09-16clk: sunxi-ng: sun6i-a31: Fix register offset for mipi-csi clkChen-Yu Tsai1-1/+1
2016-09-16clk: sunxi-ng: sun6i-a31: set CLK_SET_RATE_UNGATE for all PLLsChen-Yu Tsai1-10/+10
2016-09-16clk: sunxi-ng: sun6i-a31: Set CLK_SET_RATE_PARENT for display output clocksChen-Yu Tsai1-9/+13
2016-09-14Merge tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/...Stephen Boyd19-78/+3349
2016-09-10clk: sunxi-ng: Add hardware dependencyJean Delvare1-0/+1
2016-09-10clk: sunxi-ng: Add A23 CCUMaxime Ripard3-0/+750
2016-09-10clk: sunxi-ng: Add A33 CCU supportMaxime Ripard4-0/+856
2016-09-10clk: sunxi-ng: Add N-class clocks supportMaxime Ripard4-0/+173
2016-09-10clk: sunxi-ng: mux: Add mux table macroMaxime Ripard1-13/+13
2016-09-10clk: sunxi-ng: div: Allow to set a maximumMaxime Ripard5-33/+55
2016-09-10clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structureMaxime Ripard1-0/+14
2016-09-10clk: sunxi-ng: div: Add mux table macrosMaxime Ripard1-7/+21
2016-08-29clk: sunxi-ng: Fix wrong reset register offsetsJorik Jonker1-8/+8
2016-08-25clk: sunxi-ng: Add A31/A31s clocksChen-Yu Tsai4-0/+1318
2016-08-25clk: sunxi-ng: mux: Add clk notifier functionsChen-Yu Tsai2-0/+50
2016-08-25clk: sunxi-ng: mux: support fixed pre-dividers on multiple parentsChen-Yu Tsai3-11/+16
2016-08-25clk: sunxi-ng: mux: Add support for mux tablesChen-Yu Tsai2-6/+23
2016-08-25clk: sunxi-ng: mux: Rename mux macro to be consistentMaxime Ripard4-6/+6
2016-08-08clk: sunxi-ng: nkm: Add mux to support multiple parentsChen-Yu Tsai2-6/+57
2016-08-08clk: sunxi-ng: mux: Increase fixed pre-divider div sizeChen-Yu Tsai2-2/+2
2016-08-08clk: sunxi-ng: nk: Make ccu_nk_find_best staticChen-Yu Tsai1-3/+3
2016-08-08clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lockChen-Yu Tsai1-1/+1
2016-07-11clk: sunxi-ng: h3: Fix Kconfig symbol typoMaxime Ripard1-1/+1
2016-07-11clk: sunxi-ng: h3: Fix audio clock divider offsetMaxime Ripard1-2/+2
2016-07-08clk: sunxi-ng: Add H3 clocksMaxime Ripard4-0/+904
2016-07-08clk: sunxi-ng: Add N-K-M-P factor clockMaxime Ripard4-0/+244
2016-07-08clk: sunxi-ng: Add N-K-M Factor clockMaxime Ripard4-0/+227
2016-07-08clk: sunxi-ng: Add N-M-factor clock supportMaxime Ripard4-0/+212
2016-07-08clk: sunxi-ng: Add N-K-factor clock supportMaxime Ripard4-0/+223
2016-07-08clk: sunxi-ng: Add M-P factor clock supportMaxime Ripard4-0/+245
2016-07-08clk: sunxi-ng: Add dividerMaxime Ripard4-0/+274
2016-07-08clk: sunxi-ng: Add phase clock supportMaxime Ripard4-0/+180
2016-07-08clk: sunxi-ng: Add mux clock supportMaxime Ripard4-0/+282
2016-07-08clk: sunxi-ng: Add gate clock supportMaxime Ripard4-0/+138
2016-07-08clk: sunxi-ng: Add fractional libMaxime Ripard4-0/+175
2016-07-08clk: sunxi-ng: Add common infrastructureMaxime Ripard7-0/+291