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path: root/drivers/clk/rockchip
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2020-10-22Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds8-85/+231
2020-10-07clk: rockchip: Initialize hw to error to avoid undefined behaviorStephen Boyd1-1/+1
2020-09-22clk: rockchip: rk3399: Support module buildElaine Zhang2-1/+57
2020-09-22clk: rockchip: fix the clk config to support module buildElaine Zhang2-20/+100
2020-09-22clk: rockchip: Export some clock common APIs for module driversElaine Zhang1-22/+30
2020-09-22clk: rockchip: Export rockchip_register_softrst()Elaine Zhang1-3/+4
2020-09-22clk: rockchip: Export rockchip_clk_register_ddrclk()Elaine Zhang1-0/+1
2020-09-22clk: rockchip: Use clk_hw_register_composite instead of clk_register_composit...Elaine Zhang2-39/+40
2020-09-22clk: rockchip: rk3308: drop unused mux_timer_src_pKrzysztof Kozlowski1-1/+0
2020-08-18clk: rockchip: Fix initialization of mux_pll_src_4plls_pNathan Chancellor1-1/+1
2020-07-22clk: rockchip: add sclk_mac_lbtest to rk3188_critical_clocksAlex Bee1-0/+1
2020-07-08clk: rockchip: Revert "fix wrong mmc sample phase shift for rk3328"Robin Murphy1-4/+4
2020-07-05clk: rockchip: use separate compatibles for rk3288w-cruHeiko Stuebner1-2/+19
2020-06-17clk: rockchip: Handle clock tree for rk3288w variantMylène Josserand1-2/+18
2020-06-15clk: rockchip: convert rk3036 pll type to use internal lock statusHeiko Stuebner1-3/+23
2020-06-15clk: rockchip: convert basic pll lock_wait to use regmap_read_poll_timeoutHeiko Stuebner1-15/+6
2020-06-15clk: rockchip: convert rk3399 pll type to use readl_relaxed_poll_timeoutHeiko Stuebner1-11/+12
2020-04-13clk: rockchip: fix incorrect configuration of rk3228 aclk_gpu* clocksJustin Swartz1-13/+4
2020-03-06clk: rockchip: fix mmc get phaseJerome Brunet1-2/+2
2019-12-23clk: let init callback return an error codeJerome Brunet1-11/+17
2019-11-05clk: rockchip: protect the pclk_usb_grf as critical on px30Heiko Stuebner1-1/+2
2019-11-05clk: rockchip: add video-related niu clocks as critical on px30Heiko Stuebner1-5/+10
2019-11-05clk: rockchip: move px30 critical clocks to correct clock controllerHeiko Stuebner1-4/+4
2019-11-05clk: rockchip: Add div50 clocks for px30 sdmmc, emmc, sdio and nandcFinley Xiao1-4/+40
2019-10-31clk: rockchip: make clk_half_divider_ops staticBen Dooks (Codethink)1-2/+1
2019-09-05clk: rockchip: Add clock controller for the rk3308Finley Xiao3-0/+969
2019-07-25clk: rockchip: Fix -Wunused-const-variable in rv1108 clk driverNathan Huckleberry1-1/+0
2019-07-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds8-46/+27
2019-06-27clk: rockchip: export HDMIPHY clock on rk3228Heiko Stuebner1-1/+1
2019-06-27clk: rockchip: add watchdog pclk on rk3328Heiko Stuebner1-0/+3
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner1-4/+1
2019-06-15clk: rockchip: convert pclk_wdt boilerplat to new SGRF_GATE macroHeiko Stuebner4-36/+12
2019-06-14clk: rockchip: add a type from SGRF-controlled gate clocksHeiko Stuebner1-0/+4
2019-06-06clk: rockchip: Remove 48 MHz PLL rate from rk3288Douglas Anderson1-1/+0
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282Thomas Gleixner1-11/+1
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner17-170/+17
2019-05-20clk: rockchip: add 1.464GHz cpu-clock rate to rk3228Justin Swartz1-0/+1
2019-05-20clk: rockchip: Slightly more accurate math in rockchip_mmc_get_phase()Douglas Anderson1-3/+3
2019-05-20clk: rockchip: Don't yell about bad mmc phases when gettingDouglas Anderson1-3/+1
2019-05-20clk: rockchip: Use clk_hw_get_rate() in MMC phase calculationDouglas Anderson1-2/+2
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd12-1/+13
2019-05-07Merge branches 'clk-hisi', 'clk-lochnagar', 'clk-allwinner', 'clk-rockchip' a...Stephen Boyd4-26/+60
2019-04-23clk: core: replace clk_{readl,writel} with {readl,writel}Jonas Gorski2-4/+4
2019-04-23clk: rockchip: undo several noc and special clocks as critical on rk3288Douglas Anderson1-9/+4
2019-04-12clk: rockchip: add a COMPOSITE_DIV_OFFSET clock-typeFinley Xiao2-3/+29
2019-04-12clk: rockchip: Turn on "aclk_dmac1" for suspend on rk3288Douglas Anderson1-0/+11
2019-04-12clk: rockchip: Limit use of USB PHY clock to USB on rk3288Matthias Kaehlcke1-2/+2
2019-04-12clk: rockchip: Fix video codec clocks on rk3288Douglas Anderson1-2/+2
2019-04-11clk: rockchip: Make rkpwm a critical clock on rk3288Douglas Anderson1-1/+3
2019-03-18clk: rockchip: fix wrong clock definitions for rk3328Jonas Karlman1-9/+9