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path: root/drivers/clk/rockchip/clk-rk3288.c
AgeCommit message (Expand)AuthorFilesLines
2017-01-23clk: rockchip: rk3288: make all niu clocks criticalJacob Chen1-7/+14
2017-01-22clk: rockchip: use rk3288 vip_out clock idsJacob Chen1-1/+1
2017-01-13clk: rockchip: use rk3288 isp_in clock idsJacob Chen1-1/+1
2017-01-02clk: rockchip: describe aclk_vcodec using the new muxgrf type on rk3288Heiko Stuebner1-6/+5
2016-03-27clk: rockchip: release io resource when failing to init clkShawn Lin1-0/+1
2016-03-27clk: rockchip: Add support for multiple clock providersXing Zheng1-6/+13
2016-03-27clk: rockchip: allow varying mux parameters for cpuclk pll-sourcesXing Zheng1-0/+3
2016-02-04clk: rockchip: convert manually created factor clocks to the new typeHeiko Stuebner1-17/+5
2016-01-25clk: rockchip: fix usbphy-related clocksHeiko Stuebner1-11/+5
2016-01-02Merge branch 'clk-rockchip' into clk-nextMichael Turquette1-16/+40
2016-01-02clk: rockchip: fix section mismatches with new child-clocksHeiko Stübner1-16/+40
2015-12-23Merge branch 'clk-rockchip' into clk-nextMichael Turquette1-34/+36
2015-12-23clk: rockchip: Allow the RK3288 SPDIF clocks to change their parentSjoerd Simons1-8/+8
2015-12-23clk: rockchip: include downstream muxes into fractional dividersHeiko Stuebner1-32/+34
2015-12-21clk: rockchip: only enter pll slow-mode directly before reboots on rk3288Heiko Stuebner1-2/+2
2015-12-12clk: rockchip: use rk3288-efuse clock idsZhengShunQian1-2/+2
2015-12-01clk: rockchip: switch PLLs to slow mode before reboot for rk3288Chris Zhong1-18/+14
2015-11-26clk: rockchip: add mipidsi clock on rk3288Chris Zhong1-1/+1
2015-11-23clk: rockchip: set the id for crypto clkZain Wang1-1/+1
2015-09-04Merge tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/l...Linus Torvalds1-0/+1
2015-08-13clk: rockchip: add pclk_pd_pmu to the list of rk3288 critical clocksHeiko Stuebner1-0/+1
2015-07-28clk: rockchip: Fix PLL bandwidthDouglas Anderson1-1/+1
2015-07-06clk: rockchip: define the inverters of rk3066/rk3188 and rk3288Heiko Stuebner1-1/+6
2015-07-06clk: rockchip: fix faulty vip parent name on rk3288Heiko Stuebner1-2/+2
2015-07-06clk: rockchip: rk3288: add CLK_SET_RATE_PARENT to sclk_macHeiko Stuebner1-1/+1
2015-05-05clk: rockchip: Staticize file-scope declarationsKrzysztof Kozlowski1-1/+1
2015-04-12clk: don't use __initconst for non-const arraysUwe Kleine-König1-1/+1
2015-02-21Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/...Linus Torvalds1-13/+35
2015-01-27Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller1-14/+14
2015-01-27Merge tag 'v3.20-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/...Michael Turquette1-13/+35
2015-01-22clk: rockchip: add a dummy clock for the watchdog pclk on rk3288Heiko Stuebner1-0/+8
2015-01-22clk: rockchip: add PVTM clocks on rk3288huang lin1-2/+2
2015-01-22clk: rockchip: use the clock ID for usbphy480m_srcKever Yang1-1/+1
2014-12-31GMAC: modify CRU config for Rockchip RK3288 SoCs integrated GMACRoger Chen1-7/+7
2014-12-31clk: rockchip: rk3288: Make s2r reliable by switching PLLs to slow modeDoug Anderson1-0/+14
2014-12-28clk: rockchip: fix rk3288 cpuclk core dividersHeiko Stuebner1-14/+14
2014-12-21clk: rockchip: Add CLK_SET_RATE_PARENT to sclk_uart clocksDoug Anderson1-10/+10
2014-11-28clk: rockchip: Add support for the mmc clock phases using the frameworkAlexandru M Stan1-0/+12
2014-11-28clk: rockchip: rk3288 export i2s0_clkout for use in DTSonny Rao1-1/+1
2014-11-26clk: rockchip: use clock ID for DMC (memory controller) on rk3288Jeff Chen1-4/+4
2014-11-25clk: rockchip: add ROCKCHIP_PLL_SYNC_RATE flag to some pllsHeiko Stuebner1-3/+3
2014-11-25clk: rockchip: add ability to specify pll-specific flagsHeiko Stuebner1-5/+5
2014-11-16clk: rockchip: fix clock select order for rk3288 usbphy480m_srcKever Yang1-2/+2
2014-11-16clk: rockchip: fix rk3288 clk_usbphy480m_gate bit location in registerKever Yang1-1/+1
2014-11-13clk: rockchip: ensure HCLK_VIO2_H2P and PCLK_VIO2_H2P stay enabledDmitry Torokhov1-2/+2
2014-11-10clk: rockchip: rk3288: add suspend and resumeChris Zhong1-0/+60
2014-11-04clk: rockchip: disable unused clocksKever Yang1-64/+64
2014-10-29clk: rockchip: change PLL setting for better clock jitterKever Yang1-1/+1
2014-10-20clk: rockchip: add npll to source of sclk_gpuKever Yang1-4/+4
2014-10-20clk: rockchip: rk3288: removing the CLK_SET_RATE_PARENT from i2s_clkoutJianqun1-1/+1