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path: root/drivers/clk/renesas
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2020-12-21Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds9-33/+134
2020-12-10clk: renesas: sh73a0: Stop using __raw_*() I/O accessorsGeert Uytterhoeven1-1/+1
2020-12-10clk: renesas: r8a774c0: Add RPC clocksLad Prabhakar3-0/+42
2020-12-10clk: renesas: r8a779a0: Fix R and OSC clocksGeert Uytterhoeven1-3/+10
2020-12-10clk: renesas: cpg-mssr: fix kerneldoc of cpg_mssr_privKrzysztof Kozlowski1-1/+2
2020-12-10clk: renesas: rcar-usb2-clock-sel: Replace devm_reset_control_array_get()Yejune Deng1-1/+1
2020-12-10clk: renesas: r8a774b1: Add RPC clocksBiju Das1-0/+8
2020-12-10clk: renesas: r8a774a1: Add RPC clocksBiju Das1-0/+8
2020-12-10clk: renesas: r8a779a0: Add VIN clocksJacopo Mondi1-0/+32
2020-12-10clk: renesas: r8a779a0: Add CSI4[0-3] clocksJacopo Mondi1-0/+4
2020-12-10clk: renesas: r8a779a0: Make rcar_r8a779a0_cpg_clk_register() staticGeert Uytterhoeven1-1/+1
2020-12-07clk: renesas: r9a06g032: Drop __packed for portabilityGeert Uytterhoeven1-1/+1
2020-10-26clk: renesas: rcar-gen3: Remove stp_ck handling for SDHIWolfram Sang1-26/+25
2020-09-17clk: renesas: rcar-gen3: Update description for RZ/G2Lad Prabhakar1-1/+1
2020-09-17clk: renesas: cpg-mssr: Add support for R-Car V3UYoshihiro Shimoda5-1/+316
2020-09-17clk: renesas: cpg-mssr: Add register pointers into struct cpg_mssr_privYoshihiro Shimoda1-35/+47
2020-09-17clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flagYoshihiro Shimoda3-19/+22
2020-09-04clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)Lad Prabhakar7-8/+8
2020-09-04clk: renesas: r8a7742: Add clk entry for VSPRLad Prabhakar1-1/+2
2020-07-13clk: renesas: cpg-mssr: Add r8a774e1 supportMarian-Cristian Rotariu5-0/+362
2020-06-22clk: renesas: rzg2: Mark RWDT clocks as criticalUlrich Hecht3-0/+3
2020-06-22clk: renesas: rcar-gen3: Mark RWDT clocks as criticalUlrich Hecht7-5/+7
2020-06-22clk: renesas: cpg-mssr: Mark clocks as critical only if on at bootUlrich Hecht1-8/+9
2020-05-18clk: renesas: cpg-mssr: Fix STBCR suspend/resume handlingGeert Uytterhoeven1-3/+5
2020-04-30clk: renesas: rcar-gen2: Remove superfluous CLK_RENESAS_DIV6 selectsGeert Uytterhoeven1-3/+0
2020-04-30clk: renesas: cpg-mssr: Add R8A7742 supportLad Prabhakar5-0/+288
2020-04-14clk: renesas: r9a06g032: Fix some typo in commentsChristophe JAILLET1-3/+3
2020-03-09clk: renesas: rcar-usb2-clock-sel: Add reset_controlYoshihiro Shimoda2-1/+15
2020-03-09clk: renesas: rcar-usb2-clock-sel: Add multiple clocks managementYoshihiro Shimoda1-2/+25
2020-02-21clk: renesas: Remove use of ARCH_R8A7795Geert Uytterhoeven1-1/+1
2020-02-10clk: renesas: r8a77965: Add RPC clocksDirk Behme1-0/+8
2020-02-10clk: renesas: r8a7796: Add RPC clocksDirk Behme1-0/+8
2020-02-10clk: renesas: r8a7795: Add RPC clocksDirk Behme1-0/+8
2020-02-10clk: renesas: rcar-gen3: Add CCREE clocksGeert Uytterhoeven4-1/+9
2020-02-03Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds4-8/+11
2020-01-08clk: renesas: Prepare for split of R-Car H3 config symbolGeert Uytterhoeven1-1/+1
2020-01-06remove ioremap_nocache and devm_ioremap_nocacheChristoph Hellwig1-2/+2
2019-12-20clk: renesas: r7s9210: Add SPIBSC clockChris Brandt1-0/+1
2019-12-20clk: renesas: rcar-gen3: Allow changing the RPC[D2] clocksSergei Shtylyov1-2/+4
2019-12-13clk: renesas: Remove use of ARCH_R8A7796Geert Uytterhoeven1-1/+1
2019-12-10clk: renesas: rcar-gen2: Change multipliers and dividers to u8Geert Uytterhoeven1-4/+4
2019-11-01clk: renesas: r8a7796: Add R8A77961 CPG/MSSR supportGeert Uytterhoeven4-4/+32
2019-11-01clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960Geert Uytterhoeven3-4/+4
2019-11-01clk: renesas: r8a77965: Remove superfluous semicolonGeert Uytterhoeven1-1/+1
2019-10-21clk: renesas: rcar-gen3: Switch SD clocks to .determine_rate()Geert Uytterhoeven1-7/+12
2019-10-21clk: renesas: rcar-gen3: Switch Z clocks to .determine_rate()Geert Uytterhoeven1-8/+14
2019-10-21clk: renesas: rcar-gen2: Switch Z clock to .determine_rate()Geert Uytterhoeven1-10/+13
2019-10-07clk: renesas: r8a774b1: Add TMU clockBiju Das1-0/+5
2019-10-01clk: renesas: cpg-mssr: Add r8a774b1 supportBiju Das5-0/+335
2019-10-01clk: renesas: rcar-gen3: Loop to find best rate in cpg_sd_clock_round_rate()Geert Uytterhoeven1-4/+8