Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2018-12-10 | clk: renesas: Remove usage of CLK_IS_BASIC | Stephen Boyd | 1 | -4/+4 |
2018-09-11 | clk: renesas: r9a06g032: Fix UART34567 clock rate | Phil Edworthy | 1 | -1/+2 |
2018-06-25 | clk: renesas: Renesas R9A06G032 clock driver | Michel Pollet | 1 | -0/+893 |