summaryrefslogtreecommitdiffstats
path: root/drivers/clk/renesas/r9a06g032-clocks.c
AgeCommit message (Expand)AuthorFilesLines
2021-03-30clk: renesas: Zero init clk_init_dataGeert Uytterhoeven1-4/+4
2021-03-24clk: renesas: Couple of spelling fixesBhaskar Chowdhury1-2/+2
2020-12-07clk: renesas: r9a06g032: Drop __packed for portabilityGeert Uytterhoeven1-1/+1
2020-04-14clk: renesas: r9a06g032: Fix some typo in commentsChristophe JAILLET1-3/+3
2019-08-23clk: renesas: r9a06g032: Set GENPD_FLAG_ALWAYS_ON for clock domainGeert Uytterhoeven1-1/+2
2019-06-04clk: renesas: r9a06g032: Add clock domain supportGareth Williams1-69/+158
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd1-0/+1
2019-04-02clk: renesas: r9a06g032: Add missing PCI USB clockGareth Williams1-0/+1
2018-12-10clk: renesas: Remove usage of CLK_IS_BASICStephen Boyd1-4/+4
2018-09-11clk: renesas: r9a06g032: Fix UART34567 clock ratePhil Edworthy1-1/+2
2018-06-25clk: renesas: Renesas R9A06G032 clock driverMichel Pollet1-0/+893