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path:
root
/
drivers
/
clk
/
meson
/
gxbb.c
Age
Commit message (
Expand
)
Author
Files
Lines
2018-03-14
clk: meson: Drop unused local variable and add static
Stephen Boyd
1
-2
/
+2
2018-03-13
clk: meson: clean-up clk81 clocks
Jerome Brunet
1
-4
/
+2
2018-03-13
clk: meson: add fdiv clock gates
Jerome Brunet
1
-10
/
+90
2018-03-13
clk: meson: add mpll pre-divider
Jerome Brunet
1
-3
/
+20
2018-03-13
clk: meson: add gp0 frac parameter for axg and gxl
Jerome Brunet
1
-1
/
+6
2018-03-13
clk: meson: remove special gp0 lock loop
Jerome Brunet
1
-1
/
+0
2018-03-13
clk: meson: poke pll CNTL last
Jerome Brunet
1
-2
/
+2
2018-03-13
clk: meson: use hhi syscon if available
Jerome Brunet
1
-11
/
+28
2018-03-13
clk: meson: split divider and gate part of mpll
Jerome Brunet
1
-21
/
+57
2018-03-13
clk: meson: migrate plls clocks to clk_regmap
Jerome Brunet
1
-185
/
+239
2018-03-13
clk: meson: migrate the audio divider clock to clk_regmap
Jerome Brunet
1
-21
/
+9
2018-03-13
clk: meson: migrate mplls clocks to clk_regmap
Jerome Brunet
1
-84
/
+77
2018-03-13
clk: meson: migrate muxes to clk_regmap
Jerome Brunet
1
-160
/
+150
2018-03-13
clk: meson: migrate dividers to clk_regmap
Jerome Brunet
1
-109
/
+108
2018-03-13
clk: meson: migrate gates to clk_regmap
Jerome Brunet
1
-129
/
+137
2018-03-13
clk: meson: add regmap to the clock controllers
Jerome Brunet
1
-10
/
+23
2018-03-13
clk: meson: remove obsolete comments
Jerome Brunet
1
-6
/
+0
2018-03-13
clk: meson: only one loop index is necessary in probe
Jerome Brunet
1
-7
/
+6
2018-03-13
clk: meson: use devm_of_clk_add_hw_provider
Jerome Brunet
1
-2
/
+3
2018-03-13
clk: meson: use dev pointer where possible
Jerome Brunet
1
-1
/
+1
2018-02-12
clk: meson: gxbb: add the fractional part of the fixed_pll
Jerome Brunet
1
-0
/
+5
2018-02-12
clk: meson: fix rate calculation of plls with a fractional part
Jerome Brunet
1
-1
/
+13
2018-02-12
clk: meson: add the gxl hdmi pll
Jerome Brunet
1
-2
/
+48
2018-02-12
clk: meson: add od3 to the pll driver
Jerome Brunet
1
-0
/
+5
2018-02-12
clk: meson: remove useless pll rate params tables
Jerome Brunet
1
-94
/
+0
2017-12-14
clk: meson: make the spinlock naming more specific
Yixun Lan
1
-56
/
+56
2017-12-08
clk: meson: gxbb: remove IGNORE_UNUSED from mmc clocks
Jerome Brunet
1
-13
/
+3
2017-11-27
clk: meson: gxbb: fix wrong clock for SARADC/SANA
Yixun Lan
1
-2
/
+2
2017-10-20
clk: meson: gxbb: Add VPU and VAPB clocks data
Neil Armstrong
1
-0
/
+292
2017-08-23
Merge tag 'meson-clk-for-4.14' of git://github.com/baylibre/clk-meson into cl...
Stephen Boyd
1
-4
/
+185
2017-08-04
clk: meson: gxbb: Add sd_emmc clk0 clocks
Jerome Brunet
1
-0
/
+177
2017-08-04
clk: meson: gxbb: fix clk_mclk_i958 divider flags
Jerome Brunet
1
-3
/
+4
2017-08-04
clk: meson: gxbb: fix meson cts_amclk divider flags
Jerome Brunet
1
-1
/
+2
2017-08-04
clk: meson: gxbb: fix protection against undefined clks
Jerome Brunet
1
-0
/
+2
2017-08-01
clk: meson: mpll: fix mpll0 fractional part ignored
Jerome Brunet
1
-0
/
+5
2017-06-16
Merge tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson into ...
Stephen Boyd
1
-5
/
+8
2017-06-16
clk: meson: gxbb: add all clk81 parents
Jerome Brunet
1
-5
/
+8
2017-06-02
clk: meson-gxbb: Add const to some parent name arrays
Stephen Boyd
1
-3
/
+3
2017-05-29
clk: meson-gxbb: Add EE 32K Clock for CEC
Neil Armstrong
1
-0
/
+54
2017-05-29
clk: gxbb: remove CLK_IGNORE_UNUSED from clk81
Jerome Brunet
1
-1
/
+1
2017-05-29
clk: meson: gxbb: remove the "cpu_clk" from the GXBB and GXL driver
Martin Blumenstingl
1
-61
/
+3
2017-04-07
clk: meson: gxbb: add cts_i958 clock
Jerome Brunet
1
-0
/
+21
2017-04-07
clk: meson: gxbb: add cts_mclk_i958
Jerome Brunet
1
-0
/
+52
2017-04-07
clk: meson: gxbb: add cts_amclk
Jerome Brunet
1
-0
/
+67
2017-04-07
clk: meson: gxbb: protect against holes in the onecell_data array
Jerome Brunet
1
-0
/
+4
2017-04-04
clk: meson-gxbb: Add GXL/GXM GP0 Variant
Neil Armstrong
1
-28
/
+273
2017-04-04
clk: meson-gxbb: Add GP0 PLL init parameters
Neil Armstrong
1
-0
/
+13
2017-04-04
clk: meson-gxbb: Add MALI clocks
Neil Armstrong
1
-0
/
+139
2017-03-27
clk: meson: gxbb: mpll: use rw operation
Jerome Brunet
1
-3
/
+3
2017-03-27
clk: meson: mpll: add rw operation
Jerome Brunet
1
-0
/
+30
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