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path:
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/
drivers
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clk
/
meson
/
clk-mpll.c
Age
Commit message (
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Author
Files
Lines
2019-05-20
clk: meson: mpll: add init callback and regs
Jerome Brunet
1
-11
/
+24
2019-05-20
clk: meson: mpll: properly handle spread spectrum
Jerome Brunet
1
-3
/
+6
2019-02-02
clk: meson: rework and clean drivers dependencies
Jerome Brunet
1
-1
/
+11
2018-05-21
clk: meson: mpll: add round closest support
Jerome Brunet
1
-5
/
+19
2018-05-18
clk: meson: use SPDX license identifiers consistently
Jerome Brunet
1
-51
/
+1
2018-03-13
clk: meson: split divider and gate part of mpll
Jerome Brunet
1
-44
/
+0
2018-03-13
clk: meson: migrate mplls clocks to clk_regmap
Jerome Brunet
1
-65
/
+37
2018-02-12
clk: meson: add axg misc bit to the mpll driver
Jerome Brunet
1
-0
/
+7
2017-12-23
clk: meson: mpll: use 64-bit maths in params_from_rate
Martin Blumenstingl
1
-1
/
+1
2017-08-01
clk: meson: mpll: fix mpll0 fractional part ignored
Jerome Brunet
1
-0
/
+7
2017-04-07
clk: meson: mpll: use 64bit math in rate_from_params
Martin Blumenstingl
1
-1
/
+1
2017-04-07
clk: meson: mpll: fix division by zero in rate_from_params
Martin Blumenstingl
1
-11
/
+15
2017-03-27
clk: meson: mpll: correct N2 maximum value
Jerome Brunet
1
-1
/
+1
2017-03-27
clk: meson: mpll: add rw operation
Jerome Brunet
1
-5
/
+147
2016-06-22
clk: meson: add mpll support
Michael Turquette
1
-0
/
+94