| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2019-09-20 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 18 | -11/+2102 |
| 2019-09-17 | clk: mediatek: Runtime PM support for MT8183 mcucfg clock provider | Weiyi Lu | 1 | -2/+5 |
| 2019-09-17 | clk: mediatek: Register clock gate with device | Weiyi Lu | 4 | -6/+23 |
| 2019-09-17 | clk: mediatek: add pericfg clocks for MT8183 | Chunfeng Yun | 1 | -0/+30 |
| 2019-09-09 | clk: mediatek: Add MT6779 clock support | mtk01761 | 11 | -0/+1974 |
| 2019-08-08 | clk: reset: Modify reset-controller driver | yong.liang | 3 | -4/+71 |
| 2019-07-22 | clk: mediatek: mt8183: Register 13MHz clock earlier for clocksource | Weiyi Lu | 1 | -12/+34 |
| 2019-07-17 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 5 | -24/+72 |
| 2019-07-12 | Merge branches 'clk-debugfs', 'clk-unused', 'clk-refactor' and 'clk-qoriq' in... | Stephen Boyd | 1 | -5/+0 |
| 2019-06-07 | clk: mediatek: mt8516: Remove unused variable | Philippe Mazenauer | 1 | -5/+0 |
| 2019-06-06 | clk: mediatek: Remove MT8183 unused clock | Erin Lo | 1 | -19/+0 |
| 2019-06-06 | clk: mediatek: add audsys clock driver for MT8516 | Fabien Parent | 3 | -0/+72 |
| 2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 | Thomas Gleixner | 35 | -315/+35 |
| 2019-05-21 | treewide: Add SPDX license identifier - Makefile/Kconfig | Thomas Gleixner | 1 | -0/+1 |
| 2019-05-07 | Merge branches 'clk-renesas', 'clk-qcom', 'clk-mtk', 'clk-milbeaut' and 'clk-... | Stephen Boyd | 20 | -33/+3392 |
| 2019-04-25 | clk: mediatek: add clock driver for MT8516 | Fabien Parent | 3 | -0/+824 |
| 2019-04-12 | clk: mediatek: fix clk-gate flag setting | Weiyi Lu | 1 | -2/+1 |
| 2019-04-11 | clk: mediatek: Allow changing PLL rate when it is off | James Liao | 1 | -11/+2 |
| 2019-04-11 | clk: mediatek: Add MT8183 clock support | Weiyi Lu | 15 | -0/+2196 |
| 2019-04-11 | clk: mediatek: Add configurable pcw_chg_reg to mtk_pll_data | Weiyi Lu | 2 | -6/+12 |
| 2019-04-11 | clk: mediatek: Add configurable pcwibits and fmin to mtk_pll_data | Owen Chen | 2 | -4/+13 |
| 2019-04-11 | clk: mediatek: Add new clkmux register API | Owen Chen | 3 | -1/+314 |
| 2019-04-11 | clk: mediatek: Disable tuner_en before change PLL rate | Owen Chen | 1 | -14/+34 |
| 2019-03-08 | Merge branches 'clk-typo', 'clk-json-schema', 'clk-mtk-2712-eco' and 'clk-roc... | Stephen Boyd | 1 | -2/+6 |
| 2019-03-08 | Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk... | Stephen Boyd | 7 | -41/+75 |
| 2019-02-26 | clk: mediatek: correct cpu clock name for MT8173 SoC | Seiya Wang | 1 | -2/+2 |
| 2019-02-26 | clk: mediatek: Mark bus and DRAM related clocks as critical | Jasper Mattsson | 1 | -25/+43 |
| 2019-02-26 | clk: mediatek: Add flags to mtk_gate | Jasper Mattsson | 4 | -3/+7 |
| 2019-02-26 | clk: mediatek: Add MUX_FLAGS macro | Jasper Mattsson | 1 | -2/+6 |
| 2019-02-25 | clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel | chunhui dai | 1 | -2/+2 |
| 2019-02-25 | clk: mediatek: add MUX_GATE_FLAGS_2 | chunhui dai | 2 | -7/+15 |
| 2019-02-22 | clk: mediatek: fix platform_no_drv_owner.cocci warnings | YueHaibing | 1 | -1/+0 |
| 2019-02-05 | clk: mediatek: update clock driver of MT2712 | Weiyi Lu | 1 | -2/+6 |
| 2018-12-05 | clk: mediatek: fix the PCIe MAC clock parent | Ryder Lee | 1 | -2/+2 |
| 2018-11-30 | clk: mediatek: Drop more __init markings for driver probe | Stephen Boyd | 1 | -2/+2 |
| 2018-11-30 | clk: mediatek: Drop __init from mtk_clk_register_cpumuxes() | Stephen Boyd | 1 | -4/+4 |
| 2018-11-29 | clk: mediatek: add clock support for MT7629 SoC | Ryder Lee | 5 | -0/+1064 |
| 2018-08-30 | clk: mediatek: remove unused array audio_parents | Colin Ian King | 1 | -5/+0 |
| 2018-06-04 | Merge branches 'clk-hisi-usb', 'clk-silent-bulk', 'clk-mtk-hdmi', 'clk-mtk-ma... | Stephen Boyd | 4 | -2/+108 |
| 2018-05-15 | clk: mediatek: add g3dsys support for MT2701 and MT7623 | Sean Wang | 3 | -0/+102 |
| 2018-05-15 | clk: mediatek: correct the clocks for MT2701 HDMI PHY module | Ryder Lee | 1 | -2/+6 |
| 2018-04-06 | Merge branches 'clk-mediatek', 'clk-hisi', 'clk-allwinner', 'clk-ux500' and '... | Stephen Boyd | 5 | -8/+215 |
| 2018-03-20 | clk: mediatek: add audsys support for MT2701 | Ryder Lee | 3 | -0/+193 |
| 2018-03-20 | clk: mediatek: add devm_of_platform_populate() for MT7622 audsys | Ryder Lee | 1 | -1/+13 |
| 2018-03-19 | clk: mediatek: update clock driver of MT2712 | Weiyi Lu | 1 | -14/+55 |
| 2018-03-19 | clk: mediatek: update missing clock data for MT7622 audsys | Ryder Lee | 1 | -0/+1 |
| 2018-03-19 | clk: mediatek: fix PWM clock source by adding a fixed-factor clock | Sean Wang | 1 | -7/+8 |
| 2018-01-10 | clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being built | Sean Wang | 3 | -9/+2 |
| 2017-12-26 | clk: mediatek: Fix all warnings for missing struct clk_onecell_data | Sean Wang | 1 | -0/+1 |
| 2017-12-21 | clk: mediatek: group drivers under indpendent menu | Sean Wang | 1 | -46/+50 |
