linux - Linux Kernel (branches are rebased on master from time to time)

Age	Commit message (Expand)	Author	Files	Lines
2022-01-19	clk: mediatek: relicense mt7986 clock driver to GPL-2.0	Sam Shih	3	-3/+3
2022-01-06	clk: mediatek: add mt7986 clock support	Sam Shih	6	-0/+819
2022-01-06	clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers	AngeloGioacchino Del Regno	1	-4/+2
2022-01-06	clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper	AngeloGioacchino Del Regno	1	-11/+7
2021-11-02	clk:mediatek: remove duplicate include in clk-mt8195-imp_iic_wrap.c	Ran Jianping	1	-2/+0
2021-09-14	clk: mediatek: Export clk_ops structures to modules	Stephen Boyd	1	-0/+2
2021-09-14	clk: mediatek: support COMMON_CLK_MT6779 module build	Miles Chen	10	-17/+35
2021-09-14	clk: mediatek: support COMMON_CLK_MEDIATEK module build	Miles Chen	8	-1/+33
2021-09-14	clk: mediatek: Add MT8195 apusys clock support	Chun-Jie Chen	2	-1/+94
2021-09-14	clk: mediatek: Add MT8195 imp i2c wrapper clock support	Chun-Jie Chen	2	-1/+69
2021-09-14	clk: mediatek: Add MT8195 wpesys clock support	Chun-Jie Chen	2	-1/+145
2021-09-14	clk: mediatek: Add MT8195 vppsys1 clock support	Chun-Jie Chen	2	-1/+109
2021-09-14	clk: mediatek: Add MT8195 vppsys0 clock support	Chun-Jie Chen	2	-1/+111
2021-09-14	clk: mediatek: Add MT8195 vencsys clock support	Chun-Jie Chen	2	-1/+71
2021-09-14	clk: mediatek: Add MT8195 vdosys1 clock support	Chun-Jie Chen	2	-1/+141
2021-09-14	clk: mediatek: Add MT8195 vdosys0 clock support	Chun-Jie Chen	2	-1/+124
2021-09-14	clk: mediatek: Add MT8195 vdecsys clock support	Chun-Jie Chen	2	-1/+106
2021-09-14	clk: mediatek: Add MT8195 scp adsp clock support	Chun-Jie Chen	2	-1/+48
2021-09-14	clk: mediatek: Add MT8195 mfgcfg clock support	Chun-Jie Chen	2	-1/+48
2021-09-14	clk: mediatek: Add MT8195 ipesys clock support	Chun-Jie Chen	2	-1/+53
2021-09-14	clk: mediatek: Add MT8195 imgsys clock support	Chun-Jie Chen	2	-1/+97
2021-09-14	clk: mediatek: Add MT8195 ccusys clock support	Chun-Jie Chen	2	-1/+51
2021-09-14	clk: mediatek: Add MT8195 camsys clock support	Chun-Jie Chen	2	-1/+144
2021-09-14	clk: mediatek: Add MT8195 infrastructure clock support	Chun-Jie Chen	2	-1/+207
2021-09-14	clk: mediatek: Add MT8195 peripheral clock support	Chun-Jie Chen	2	-1/+64
2021-09-14	clk: mediatek: Add MT8195 topckgen clock support	Chun-Jie Chen	2	-1/+1274
2021-09-14	clk: mediatek: Add MT8195 apmixedsys clock support	Chun-Jie Chen	3	-0/+154
2021-09-14	clk: mediatek: Fix resource leak in mtk_clk_simple_probe	Chun-Jie Chen	1	-2/+10
2021-09-14	clk: mediatek: Add API for clock resource recycle	Chun-Jie Chen	2	-0/+10
2021-09-14	clk: mediatek: Fix corner case of tuner_en_reg	Chun-Jie Chen	1	-1/+1
2021-07-27	clk: mediatek: make COMMON_CLK_MT8167* depend on COMMON_CLK_MT8167	Miles Chen	1	-15/+10
2021-07-27	clk: mediatek: Add MT8192 vencsys clock support	Chun-Jie Chen	3	-0/+60
2021-07-27	clk: mediatek: Add MT8192 vdecsys clock support	Chun-Jie Chen	3	-0/+101
2021-07-27	clk: mediatek: Add MT8192 scp adsp clock support	Chun-Jie Chen	3	-0/+57
2021-07-27	clk: mediatek: Add MT8192 msdc clock support	Chun-Jie Chen	3	-0/+92
2021-07-27	clk: mediatek: Add MT8192 mmsys clock support	Chun-Jie Chen	3	-0/+115
2021-07-27	clk: mediatek: Add MT8192 mfgcfg clock support	Chun-Jie Chen	3	-0/+57
2021-07-27	clk: mediatek: Add MT8192 mdpsys clock support	Chun-Jie Chen	3	-0/+89
2021-07-27	clk: mediatek: Add MT8192 ipesys clock support	Chun-Jie Chen	3	-0/+64
2021-07-27	clk: mediatek: Add MT8192 imp i2c wrapper clock support	Chun-Jie Chen	3	-0/+126
2021-07-27	clk: mediatek: Add MT8192 imgsys clock support	Chun-Jie Chen	3	-0/+77
2021-07-27	clk: mediatek: Add MT8192 camsys clock support	Chun-Jie Chen	3	-0/+114
2021-07-27	clk: mediatek: Add MT8192 audio clock support	Chun-Jie Chen	3	-0/+125
2021-07-27	clk: mediatek: Add MT8192 basic clocks support	Chun-Jie Chen	5	-4/+1358
2021-07-27	clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers	Chun-Jie Chen	2	-0/+31
2021-07-27	clk: mediatek: Add configurable enable control to mtk_pll_data	Chun-Jie Chen	2	-14/+21
2021-07-27	clk: mediatek: Fix asymmetrical PLL enable and disable control	Chun-Jie Chen	1	-4/+16
2021-07-27	clk: mediatek: Get regmap without syscon compatible check	Chun-Jie Chen	4	-4/+4
2021-02-09	clk: mediatek: mux: Update parent at enable time	Laurent Pinchart	2	-3/+30
2021-02-09	clk: mediatek: mux: Drop unused clock ops	Laurent Pinchart	2	-70/+4