Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2013-12-11 | clk: hi3620: add gate clock flag | Haojian Zhuang | 1 | -59/+59 |
2013-12-11 | clk: hi3620: fix wrong flags on divider | Haojian Zhuang | 1 | -11/+11 |
2013-12-04 | clk: hisilicon: add common clock support | Haojian Zhuang | 5 | -0/+651 |